L9907 datasheet(13/49 Pages) STMICROELECTRONICS

13 / 49 page

DS11800 Rev 5

13/49

L9907

Functional description

When BST_DIS_EN bit of CMD2 SPI frame is set to 1 (refer to SPI mapping, Table 23),

BST_DIS becomes a full-time control of the boost operation: the boost will be disabled as

long as the BST_DIS pin is high. This implements a boost permanent disabler that can be

used for different reasons, e.g. to allow more precise and less noisy measurements, to

decrease power dissipation or current load on battery in all conditions when the boost is not

strictly necessary.

2.5

MOSFET drivers

MOSFET drivers are programmable current mirrors used to limit gate charge/discharge

current without gate series resistors (which can be used anyway). Programmability has two

degrees of freedom: SPI programmability (25, 50, 75, 100% of max. available current IG) for

MOSFET gate current adjustment during running application and via external resistor at

GCR pin to adjust the gate current among different applications. External MOSFETs are

protected against over current in on-state monitoring their Vds voltage. Maximum Vgs of

external MOSFETs is limited using VCAP regulator for LS drivers and dedicated floating

regulators referred to sources for HS drivers.

2.5.1

GCR pin

At GCR pin a resistor has to be connected which defines in combination with the IGx SPI

bits the gate current for charge and discharge.

Minimum value for GCR resistor is GCR(min) = 1 kΩ

- 10% (maximum allowable gate

current), maximum is GCR(max) = 22 kΩ +10% (minimum allowable gate current), but with

degraded precision performances with GCR > 6 kΩ

+ 10%. Tested values are GCR = 1 kΩ

and GCR = 6 kΩ

GCR pin circuitry implements an open/short protection in case of a too high/low resistive

load connected to it. If one of the above conditions occurs, the device switches to an

internally generated current, equivalent to approximately 15 k

. The current reference can

be switched to the internal reference by using the GCR_INT_I bit of CMD2 frame (refer to

SPI mapping, Table 23); this can be used when a reduced power dissipation is needed.

2.5.2

Shoot through protection

Shoot through protection's aim is to avoid destructive cross current conduction between

high-side and low-side FETs of the same phase in case of unwanted condition when

PWM_Hx and PWM_Lx signals are set to logic '1' at the same time (e.g. because of a

controller fault). With every activation of either PWM_Hx or PWM_Lx the cross current

protection time is activated and switches off the corresponding half bridge for the

programmed Dead time. The shoot through condition is validated via an up-down counter

which is proportional to the programmed dead time. With this feature, continuous activation

of HS and LS and also high frequency oscillations of the PWMx input signals (HS and LS)

are detected and the shoot through failure state is set. If the fault condition is validated, all

external FETs are switched OFF and FS_FLAG is asserted low. No SPI SDO diagnostic bit

is set, since the hypothesis is that the controller is not able to work properly. In case the

SHT_PH bit of CMD2 SPI frame would be set to 1 (refer to SPI mapping, Table 23), the

device allows the switching off of the only phase for which the shoot through occurred. The

phase that experienced the fault is reported on DIAG2 SPI frame (SDO bits B<2:0>). In

order to re-enable FET pre-drivers, at least one Enable signal EN1 or EN2 must be toggled.

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