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VNF1048F 数据表(PDF) 37 Page - STMicroelectronics |
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VNF1048F 数据表(HTML) 37 Page - STMicroelectronics |
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37 / 49 page ![]() 7 Operating modes 7.1 State diagram Figure 15. State diagram GoToUnlocked SPI sequence GoToUnlocked SPI sequence WD_FAIL = 1 OR GSB_SPIE =1 OR HWLO_ST = 1 [1] OR EN = 0 [3] Wake-up Unlocked Locked VS < VS_POR_OFF VS > VS_POR_ON Power-on Standby Self-test t > tPWON 'OUTCTL' = 0 'RSTB' = 1 'BYPASSCTL' = 0 External FET is OFF BYPASS is OFF Control registers locked Registers reset to default BYPASS = 'BYPASSCTL' I S = I S_Q External FET is OFF SPI is not active Registers as in previous state I SPI = I SPI STBY 'GOSTBY' = 0 BYPASS depends on test External FET depends on test SPI is active External FET is ON 'DIAG' = 0 BYPASS is OFF External FET is OFF SPI is active 'WAKEUPM' = 1 Control registers locked 'BYPASS_SAT' = 1 (*) External FET = 'OUTCTL' BYPASS = 'BYPASSCTL' 'EN' =1 (**) SPI is active I S = I S(ON) External FET depends on Control registers locked 'DIS_OUT_MODE', BYPASS depends on 'DIS_OUT_MODE', SPI is active 'EN' = 0 (***) 'LOCKEDM' = 1 (***) Transition to locked resets "EN" bit to 1 and sets 'DIS_OUT_FAULT' to 1 only if 'DIS_OUT_MODE' = 1. (**) Transition to unlocked sets "EN' bit to 1. (*) Transition to wakeup sets 'BYPASS_SAT' status bit to 1. When there are more then one possibletransitions out of one state, priority number is indicated in brackets for each transition. Notes: 7.2 Power-on mode The power-on mode is the device reset state at VS power-on, due to device startup or power-on reset conditions. At power-on, the registers are loaded with the default values and the RSTB is set to 1. External FET, BYPASS switch, and charge pump are in the OFF state. VNF1048F Operating modes DS13084 - Rev 8 page 37/49 |
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