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LP5024 数据表(PDF) 21 Page - Texas Instruments |
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LP5024 数据表(HTML) 21 Page - Texas Instruments |
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21 / 59 page ![]() • The master device sends the data byte to be written to the addressed register. • The slave device sends an acknowledge signal. • If the master device sends further data bytes, the control register address of the slave is incremented by 1 after the acknowledge signal. To reduce program load time, the device supports address auto incrementation. The register address is incremented after each 8 data bits. • The write cycle ends when the master device creates a stop condition. Figure 7-11. Write Cycle 7.5.1.6 Control-Register Read Cycle • The master device generates a start condition. • The master device sends the slave address (7 bits) and the data direction bit (R/ W = 0). • The slave device sends an acknowledge signal if the slave address is correct. • The master device sends the control register address (8 bits). • The slave device sends an acknowledge signal. • The master device generates a repeated-start condition. • The master device sends the slave address (7 bits) and the data direction bit (R/ W = 1). • The slave device sends an acknowledge signal if the slave address is correct. • The slave device sends the data byte from the addressed register. • If the master device sends an acknowledge signal, the control-register address is incremented by 1. The slave device sends the data byte from the addressed register. To reduce program load time, the device supports address auto incrementation. The register address is incremented after each 8 data bits. • The read cycle ends when the master device does not generate an acknowledge signal after a data byte and generates a stop condition. Figure 7-12. Read Cycle 7.5.1.7 Auto-Increment Feature The auto-increment feature allows writing or reading several consecutive registers within one transmission. For example, when an 8-bit word is sent to the device, the internal address index counter is incremented by 1, and the next register is written. The auto-increment feature is enabled by default and can be disabled by setting the Auto_Incr_EN bit = 0 in the DEVICE_CONFIG1 register. The auto-increment feature is applied for the full register address from 0h to FFh. www.ti.com LP5018, LP5024 SLVSEB8C – OCTOBER 2018 – REVISED JULY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: LP5018 LP5024 |
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