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LP5024 数据表(PDF) 8 Page - Texas Instruments |
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LP5024 数据表(HTML) 8 Page - Texas Instruments |
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8 / 59 page ![]() 6.5 Electrical Characteristics over operating ambient temperature range (–40°C < TA<85°C) (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLIES (VCC) VVCC Supply voltage 2.7 5.5 V IVCC Shutdown supply current VEN = 0 V 0.2 1 µA Standby supply current VEN = 3.3 V, Chip_EN = 0 (bit) 6 10 Normal-mode supply current With 10-mA LED current per OUTx 5 8 mA Power-save mode supply current VEN = 3.3 V, Chip_EN = 1 (bit), Power_Save_EN = 1 (bit), all the LEDs off duration > tPSM 6 10 µA VUVR Undervoltage restart VVCC rising 2.5 V VUVF Undervoltage shutdown VVCC falling 2 V VUV_HYS Undervoltage shutdown hysteresis 0.2 V OUTPUT STAGE (OUTx) IMAX Maximum sink current (OUT0– OUTx) (For LP5024, x = 23. For LP5018, x = 17.) VVCC in full range, Max_Current_Option = 0 (bit), PWM = 100% 25.5 mA Maximum sink current (OUT0– OUTx) (For LP5024, x = 23. For LP5018, x = 17.) VVCC ≥ 3.3 V, Max_Current_Option = 1 (bit), PWM = 100% 35 ILIM Internal sink current limit (OUT0– OUTx) (For LP5024, x = 23. For LP5018, x = 17.) VVCC in full range, Max_Current_Option = 0 (bit), VIREF = 0 V 35 55 80 mA Internal sink current limit (OUT0– OUTx) (For LP5024, x = 23. For LP5018, x = 17.) VVCC ≥ 3.3V, Max_Current_Option=1 (bit), VIREF = 0 V 40 75 120 Ilkg Leakage current (OUT0–OUTx) (For LP5024, x = 23. For LP5018, x = 17.) PWM = 0% 0.1 1 µA IERR_DD Device to device current error, IERR_DD=(IAVE-ISET)/ISET×100% All channels' current set to 10 mA. PWM = 100%. Already includes the VIREF and KIREF tolerance –7% 7% IERR_CC Channel to channel current error, IERR_CC=(IOUTX-IAVE)/IAVE×100% All channels' current set to 10 mA. PWM = 100%. Already includes the VIREF and KIREF tolerance –7% 7% VIREF IREF voltage 0.7 V KIREF IREF ratio 105 ƒPWM PWM switching frequency 21 29 kHz VSAT Output saturation voltage VVCC in full range, Max_Current_Option = 0 (bit), output current set to 20 mA, the voltage when the LED current has dropped 5% 0.25 0.35 V VVCC ≥ 3.3 V, Max_Current_Option = 1 (bit), output current set to 20 mA, the voltage when the LED current has dropped 5% 0.3 0.4 LOGIC INPUTS (EN, SCL, SDA, ADDRx) VIL Low level input voltage 0.4 V VIH High level input voltage 1.4 V ILOGIC Input current –1 1 µA VSDA SDA output low level IPULLUP = 5 mA 0.4 V PROTECTION CIRCUITS LP5018, LP5024 SLVSEB8C – OCTOBER 2018 – REVISED JULY 2024 www.ti.com 8 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: LP5018 LP5024 |
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