LP5024 datasheet(7/59 Pages) TI2

7 / 59 page

6 Specifications

6.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1)

MIN

MAX

UNIT

Voltage on EN, IREF, OUTx, SCL, SDA, VCC

–0.3

Voltage on ADDRx

–0.3

VCC+0.3

Voltage on VCAP

–0.3

Continuous power dissipation

Internally limited

Junction temperature, TJ-MAX

–40

125

°C

Storage temperature, Tstg

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±4000

Charged-device model (CDM), per JEDEC specification JESD22-

C101(2)

±1500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as

±1500 V may actually have higher performance.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as ±500

V may actually have higher performance.

6.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)

MIN

MAX

UNIT

Input voltage on VCC

2.7

5.5

Voltage on OUTx

5.5

Voltage on ADDRx, EN, SDA, SCL

5.5

Operating ambient temperature, TA

–40

°C

6.4 Thermal Information

THERMAL METRIC(1)

LP5018 or LP5024

UNIT

RSM (VQFN)

DGS (VSSOP)

32 PINS

28 PINS

RθJA

Junction-to-ambient thermal resistance

36.4

80.2

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

34.8

40.8

°C/W

RθJB

Junction-to-board thermal resistance

15.9

41.0

°C/W

ψJT

Junction-to-top characterization parameter

0.9

3.8

°C/W

ψJB

Junction-to-board characterization parameter

40.7

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

6.3

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see Semiconductor and ICPackage Thermal Metrics.

www.ti.com

LP5018, LP5024

SLVSEB8C – OCTOBER 2018 – REVISED JULY 2024

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