L99MC6 datasheet(30/55 Pages) STMICROELECTRONICS

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Functional description of the SPI

L99MC6

30/32

Doc ID 16523 Rev 2

Operating code definition

The <Write mode> and <Read mode> operations allow access to the RAM of the device,

that is write to control registers or read status information.

A <Read and Clear Status> operation addressed to a device specific status register reads

back and subsequently clear this status register. A <Read and Clear Status> operation with

address 3FH clears all status registers at a time.

A <Read and Clear Status> operation addressed to an unused RAM address or

configuration register address is identical to a <Read mode> operation (in case of unused

RAM address, the second byte is equal to 00H).

<Read Device Information> allows access to the ROM area which contains device related

information such as the product family, product name, silicon version and register width.

8.2.3

Global status register

Table 15.

Operating code definition

OC1

OC0

Meaning

Table 16.

Global status register

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Global error flag

(GEF)

Communication

error

Chip reset

TSD

Chip overload

Temperature

warning

Open-load

detected

Overcurrent

detected

Unused

Table 17.

Global status register description

Bit

Description

Polarity

Comment

Unused

Active high

Always returns ‘0’

Overcurrent detected

Active high

Set by any overcurrent event

Open-load detected

Active high

Set by any open-load event

Temperature warning

Active high

Thermal shutdown / chip

overload

Active high

Chip reset

Active low

Activated by all internal reset events that change

device state or configuration registers (for

example software reset, VCC undervoltage, etc.).

The bit is cleared after a valid communication

with any register. This bit is initially ‘0’ and is set

to ‘1’ by a valid SPI communication

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