L99MC6 datasheet(33/55 Pages) STMICROELECTRONICS

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L99MC6

Functional description of the SPI

Doc ID 16523 Rev 2

33/32

8.5

Read and Clear Status operation

OC0, OC1: operating code (10 for ‘Read and Clear Status’ mode)

The ‘Read and Clear Status’ operation starts with a command byte followed by 1 data byte.

The content of the data byte is ‘do not care’. The content of the addressed status register is

transferred to SDO within the same frame (‘in-frame response’) and is subsequently

cleared.

A <Read and Clear Status> operation with address 3FH clears all status registers

simultaneously.

A <Read and Clear Status> operation addressed to an unused RAM address or to the

configuration register (3FH) is identical to a <Read mode> operation (in case of unused

RAM address, the second byte is equal to 00H).

The returned data byte represents the content of the register to be read.

Failures are indicated by activating the corresponding bit of the <Global Status> register.

8.6

Read Device Information

OC0, OC1: operating code (11 for ‘Read Device Information’ mode)

The device information is stored at the ROM. In the ROM memory area, the first 8 bits are

used.

All unused ROM addresses is read as ‘0’.

Note:

ROM address 3FH is unused. An attempt to access this address is recognized as a

communication line error (‘Data-in stuck to VCC’) and the standby mode is automatically

entered (all internal registers are cleared).

Table 20.

Command byte for Read and Clear Status operation

MSB

LSB

Operating code

Address

Table 21.

Command byte for Read Device Information

MSB

LSB

Operating code

Address

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