IS66/67WVR4M8ALL/BLL

Integrated Silicon Solution, Inc.- www.issi.com

18

Rev. A2

07/08/2024

5.7 READ ID OPERATION

In SPI mode, this command is similar to Fast Read. But 24-

bit address cycles are “don’t care” and there are

no wait cycles between address and data.

In QPI mode, there is no address cycles, but there are 6 wait cycles between command and data.

The data is wrapped to bit 7 of MF ID data again after bit 0 of EID data until CE# goes to HIGH.

Figure 5.11 SPI Read ID, 9Fh

Figure 5.12 QPI Read ID, 9Fh

CE#

CLK

Cmd

Read ID

SIO[3:0]

0

1

9

F

2

3

4

5

6

7

8

9

10

11

47:0

12

MF ID(9Dh)

13

20

7:4

3:0

7:4

3:0

KGD(5Dh)

Wait Cycles

(6 Clocks)

High-Z

tACLK

21

22

EID

tHZ

KGD [7:0]

Known Good Die

‘b0101_0101

FAIL

‘b0101_1101

PASS