M41ST87W datasheet(6/54 Pages) STMICROELECTRONICS

6 / 54 page

Description

M41ST87W

6/54

DocID9497 Rev 11

Description

The M41ST87Y/W secure serial RTC and NVRAM supervisor is a low power 1280-bit,

static CMOS SRAM organized as 160 bytes by 8 bits. A built-in 32.768 kHz oscillator

(internal crystal-controlled) and 8 bytes of the SRAM are used for the clock/calendar

function and are configured in binary coded decimal (BCD) format.

An additional 11 bytes of RAM provide calibration, status/control of alarm, watchdog,

tamper, and square wave functions. 8 bytes of ROM and finally 128 bytes of user RAM are

also provided. Addresses and data are transferred serially via a two line, bidirectional I

interface. The built-in address register is incremented automatically after each WRITE or

READ data byte. The M41ST87Y/W has a built-in power sense circuit which detects power

failures and automatically switches to the battery supply when a power failure occurs. The

energy needed to sustain the SRAM and clock operations can be supplied by a small

lithium button-cell supply when a power failure occurs.

Functions available to the user include a non-volatile, time-of-day clock/calendar, alarm

interrupts, tamper detection, watchdog timer, and programmable square wave output.

Other features include a power-on reset as well as two additional debounced inputs

(

RSTIN1andRSTIN2)whichcanalsogenerateanoutputreset(RST).Theeightclock

address locations contain the century, year, month, date, day, hour, minute, second and

tenths/hundredths of a second in 24-hour BCD format. Corrections for 28, 29 (leap year),

30 and 31 day months are made automatically.

Security features

Two fully independent tamper detection Inputs allow monitoring of multiple locations within

the system. User programmable bits provide both normally open and normally closed

switch monitoring. Time stamping of the tamper event is automatically provided. There is

also an option allowing data stored in either internal memory (128 bytes), and/or external

memory to be cleared, protecting sensitive information in the event tampering occurs. By

embedding the 32 kHz crystal in the SOX28 package, the clock is completely isolated from

external tampering. An oscillator fail bit (OF) is also provided to ensure correct operation of

the oscillator.

The M41ST87Y/W is supplied in a 28-pin, 300 mil SOIC package which includes an

embedded 32 kHz crystal and a 20-pin SSOP package for use with an external crystal.

The SOIC and SSOP packages are shipped in plastic anti-static tubes or in tape and reel

form.

The 300 mil, embedded crystal SOIC requires only a user-supplied battery to provide non-

volatile operation.

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