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M41ST87WMX6F 数据表(PDF) 23 Page - STMicroelectronics

部件名 M41ST87WMX6F
功能描述  5.0 and 3.3/3.0 V secure serial RTC and NVRAM supervisor with tamper detection and 128 bytes of clearable NVRAM
PDF  54 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M41ST87WMX6F 数据表(HTML) 23 Page - STMicroelectronics

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M41ST87W
Operating modes
DocID9497 Rev 11
23/54
Figure 18: Tamper current options
Figure 19: Tamper output timing (with CLR1EXT or CLR2EXT = '1') - available in SOX28
package only
1.
If connected to a negative charge pump device, this pin must be isolated from the
charge pump by using both n-channel and p-channel MOSFETs as illustrated in
Figure 20: "RAM clear hardware hookup (SOX28 package only)".
2.
If the device is in battery back-up; NOT on VCC (see Section 2.6.9: "RAM clear
external (CLR1EXT and CLR2EXT) - available in SOX28 package only"). VOUT is
forced to GND during a tamper event when on VCC.
3.
If TIEX = '1.'
4.
If ABE = '1' and device is in battery backup mode.
TAMPER LO,
NORMAL LY OPEN
TAMPER HI,
NORMAL LY CLOSED
User
Configuration
User Configuration
User Configuration
TDS
X
= 0
TDS
X
= 1
TDS
X
= 0
TDS
X
= 1
TAMPER HI ,
NORMAL LY OPEN
TAMPER LO,
NORMAL LY CLOSED
CONTINUOUS
MONI TORING
CONTINUOUS
MONI TORING
CONTINUOUS
MONI TORING
SAMPLED
MONI TORING
CONTINUOUS
MONI TORING
SAMPLED
MONI TORING
V
CC (VOU T)
TP
X (TP1, TP2)
V
CC (VOU T)
V
CC (VOU T)
TCM
X
, TPM
X
TCHI/TCLO = 0
TCHI/TCLO = 1
TCHI/TCLO = 0
TCHI/TCLO = 1
TPCLR
VOUT
(1)
RST
Tamper
Event
(TB Bit set)
High-Z
(2)
trec
t CLR
t CLRD
ECON
IRQ/OUT
(3)
High-Z
(4)



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