L99DZ80EP datasheet(47/68 Pages) STMICROELECTRONICS

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L99DZ80EP

Functional description of the SPI

4.2

Command byte

OCx: operation code

Ax: address

Dx: data bit

Each communication frame starts with a command byte. It consists of an operating code

which specifies the type of operation (<Read>, <Write>, <Read and Clear>, <Read Device

Information>) and a 6 bit address. If less than 6 bits are required, the remaining bits are

unused but are reserved.

4.2.1

Operation code definition

The <Write Mode> and <Read Mode> operations allow access to the RAM of the device.

A <Read and Clear Mode> operation is used to read a status register and subsequently

clear its content.

The <Read Device Information> allows access to the ROM area which contains device

related information such as <ID-Header>, <Product Code>, <Silicon Version> and <SPI-

frame-ID>.

4.3

Device memory map

Table 28. Command byte

Command byte

Data byte 1

Data byte 2

Bit

21 20 19 18 17 16

9876543210

Name OC1 OC0 A5 A4 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Table 29. Operation code definition

OC1

OC0

Meaning

Table 30. RAM memory map

Address

Name

Access

Content

00h

Control Register 0

Read/write

Device enable, output bridge and H-bridge open-load

control

01h

Control Register 1

Read/write

High-side/ low-side and electrochrome control

02h

Control Register 2

Read/write

Bridge recovery mode, PWM and electrochrome setup

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