Applications information

PM8804

18/27

DocID031629 Rev 1

Figure 7. Timing relation between output drivers as a function of DT

In both the flyback and forward applications the default status of GAT2 is the opposite of

GAT1: in fact GAT1 must be set at LOW level to guarantee the off state of the main

MOSFET, GAT2 must be set at HIGH level to assure the off state to the secondary MOSFET

in flyback converters and to assure the off state of the active clamp P-channel MOSFET in

forward active clamp converters.

Through MODE pin it is possible to enable or disable the secondary driver GAT2 and the

soft-stop feature. If MODE pin is left open, it is driven high by an internal pull-up: GAT2 and

soft-stop are enabled. If MODE pin is lowered under VTH_MODE threshold (0.7 V), GAT2

and soft-stop are disabled.

Typically the use of the MODE pin for the most used topologies is as follows:

Synchronous flyback NO soft-stop and MODE tied to PGD pin with resistive divider, PGD

pulled up to VC; with a proper selection of the divider it is possible take MODE pin high

when the PGD signal is high too; while during the turn off, MODE pin will be driven low

disabling the soft-stop feature.

Active clamp forward: YES soft-stop and MODE left open.

The following pictures show the drivers' waveforms in different operating conditions.

Figure 8. Drivers' waveforms at soft-start (PGD rising)