UCD3138RJAR datasheet(73/99 Pages) TI2

73 / 99 page

• Avoid long traces close to radiation components and place them into an internal layer. It is preferred to have

grounding shield and add a termination circuit at the end of long traces.

• Do NOT use a ferrite bead or a resistor with a value of 3-Ω or larger resistor to connect between V33A and

V33D.

• Avoid negative current/negative voltage (–0.3 V) on all pins. Avoid voltage spikes of more than 3.8V on all

pins. Schottky diodes may be required to clamp the voltage on any pins that could have voltage spikes during

surge tests. Note that Schottky diodes have relatively higher leakage current, which can affect the voltage

sensing at high temperature.

• If the bias supply to the device is a switching supply, ripple should be minimized. The higher the peak-to-peak

magnitude and frequency of the ripple, the more the oscillator frequency changes.

12.1.4 UCD3138 Pin Connection Recommendation

The UCD3138 device is a highly integrated controller with a large number of mixed signals. It is important to

group each pin, select good components, have appropriate connections to each pin, and make good component

placement on the PCB to reduce noise coupling and to prevent chip mal-function. First, group all digital circuitry

and analog circuitry. Second, place digital circuitry close to each other, place analog circuitry close to each other,

and then make connections among them by a solid plane(SGND). To achieve a robust design, TI recommends

at least a 4-layer board.

Next, layout considerations and examples are provided for some critical pins or signals.

12.1.4.1 Current Amplifier With EADC Connection

As shown in Figure 12-2, if a current amplifier is used for current sensing, a differential input is recommended to

suppress common mode noise. Then it is followed by a local low-pass filter (LPF), LPF should be placed close to

the EAP and EAN pins of the UCD device. Both filters must be connected to the same ground plane (SGND).

Figure 12-2. Current Amplifier Connected With EADC

12.1.4.2 DPWM Synchronization

For half bridge or full-bridge converter, where more than one DPWM modules are used to drive multiple pairs of

MOSFETs, synchronization between DPWM modules is required. The synchronization can be achieved by using

Master-Slave mode. A slaved DPWM can be synchronized with other Master DPWM or Slave DPWM. Without

synchronization, the DPWM could go out of synchronization at large currents which can cause catastrophic

damage.

Please note: For UCD3138ARMH and UCD3138ARJA, if the system use case is below -30C, DPWM fixed edge

alignment should be avoided and at least a 4ns gap should be configured.

www.ti.com

UCD3138

SLUSAP2J – MARCH 2012 – REVISED NOVEMBER 2021

Submit Document Feedback

Product Folder Links: UCD3138

UCD3138RJAR 数据表(PDF) 73 Page - Texas Instruments

UCD3138RJAR 数据表(HTML) 73 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99

数据表下载