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SAP5SD-A-G1-R 数据表(PDF) 53 Page - Zentrum Mikroelektronik Dresden AG |
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SAP5SD-A-G1-R 数据表(HTML) 53 Page - Zentrum Mikroelektronik Dresden AG |
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53 / 62 page ![]() SAP5S / SAP51 Universal Actuator-Sensor Interface IC Data Sheet July 17, 2012 © 2012 Zentrum Mikroelektronik Dresden AG — Rev. 3.1 All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to changes without notice. 53 of 62 4.19.3. Functional Description In Master/Repeater Mode the SAP5 provides a simple physical-layer interface function between the AS-I line and an external binary channel. The signal RX_DAT represents the Manchester-II-coded, re-synchronized equivalent of the telegram signal received at the AS-i input channel. Polarity of that bitstream depends on the programmed operation mode according to Table 37. Table 37: Functional Distinctions of SAP5 Master- and Repeater Mode Modulation of signal RX_DAT in case of ASI Power Fail Loopback Mode Polarity of signal RX_DAT Master Mode 1 ON ON active HIGH Master Mode 2 OFF ON active HIGH Repeater Mode OFF OFF active LOW Every received AS-i telegram is checked for consistency with the protocol specifications and timing jitters become removed as long as they stay within the specified limits. In case a telegram error is detected, the output signal becomes inactive for a time period defined by tBREAK (refer to Table 39). The signal TX_DAT is directly forwarded to the AS-i line transmitter avoiding any additional logic delays. In case the Loopback Mode is not active, the AS-i receiver gets disabled as long as the SAP5 is transmitting an AS-i signal. Otherwise, the transmitted signal is read back in parallel and provided at the RX_DAT output for checkup purposes. The Loopback time tLOOPBACK is mainly defined by the analog signal processing within the Receiver and the Transmitter. However, an additional delay of up to 1875ns may be inserted if necessary. Therefore, the ID_Code_Extension_2 EEPROM register has to be programmed as described below. NOTE: The ID_Code_Extension_2 has to be programmed before programming of the Master_Mode flag. Once the Master_Mode flag is set to logic HIGH, the slave functionality of the SAP5 is no longer available, preventing any write access to the E²PROM by use of AS-i master requests as described on page 25. Table 38: Programmable Variation of the Loopback time ID_Code_Extension_2 (ID2_Bit3 … ID2_Bit0) t loopback Unit 0000 0 0001 +125 0010 +250 0011 +375 0100 +500 0101 +625 0110 +750 0111 +875 1000 +1000 1001 +1125 1010 +1250 1011 +1375 1100 +1500 1101 +1625 1110 +1750 1111 +1875 ns |
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