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TLV9152SIRUGR 数据表(PDF) 56 Page - Texas Instruments

部件名 TLV9152SIRUGR
功能描述  TLV915x 4.5-MHz, Rail-to-Rail Input/Output, Low Offset Voltage, Low Noise Op Amp
PDF  85 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

TLV9152SIRUGR 数据表(HTML) 56 Page - Texas Instruments

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PACKAGE OUTLINE
1.6
1.4
2.1
1.9
0.40
0.34
0.05
0.00
2X 1.5
6X 0.5
10X
0.45
0.35
4X
0.25
0.15
2X
0.35
0.25
4X
0.3
0.2
0.1 MIN
SIDE WALL
WETTABLE FLANK
(0.127) TYP
X2QFN - 0.4 mm max height
RUG0010B
PLASTIC QUAD FLATPACK - NO LEAD
4220582/B 05/2025
0.05 C
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Minimum 0.1 mm solder wetting on pin side wall. Available for wettable flank version only.
PIN 1 INDEX AREA
SEATING PLANE
PIN 1 ID
(45 X 0.1)
SYMM
SYMM
1
4
5
6
9
10
0.1
C A B
0.05
C
0.1
C A B
0.05
C
0.1
C A B
0.05
C
SCALE 7.500
50.000
OPTIONAL: SIDE WALL PIN DETAIL
NOTE 3
A
B
C



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