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TLV9152SIRUGR 数据表(PDF) 11 Page - Texas Instruments

部件名 TLV9152SIRUGR
功能描述  TLV915x 4.5-MHz, Rail-to-Rail Input/Output, Low Offset Voltage, Low Noise Op Amp
PDF  85 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

TLV9152SIRUGR 数据表(HTML) 11 Page - Texas Instruments

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6.7 Electrical Characteristics
For VS = (V+) – (V–) = 2.7 V to 16 V (±1.35 V to ±8 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT
= VS / 2, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
VOS
Input offset voltage
TLV9151, TLV9152
VCM = V–
±125
±750
µV
TA = –40°C to 125°C
±780
TLV9154
VCM = V–
±125
±830
TA = –40°C to 125°C
±880
dVOS/dT
Input offset voltage drift
TA = –40°C to 125°C
±0.3
µV/
℃
PSRR
Input offset voltage
versus power supply
VCM = V–, VS = 4 V to 16 V
TA = –40°C to 125°C
±0.3
±1.6
μV/V
VCM = V–, VS = 2.7 V to 16 V(2)
±1
±8.64
Channel separation
f = 0 Hz
5
µV/V
INPUT BIAS CURRENT
IB
Input bias current
±10
pA
IOS
Input offset current
±10
pA
NOISE
EN
Input voltage noise
f = 0.1 Hz to 10 Hz
1.8
μVPP
0.3
µVRMS
eN
Input voltage noise
density
f = 1 kHz
10.8
nV/√Hz
f = 10 kHz
9.4
iN
Input current noise
f = 1 kHz
2
fA/√Hz
INPUT VOLTAGE RANGE
VCM
Common-mode voltage
range
(V–) – 0.1
(V+) + 0.1
V
CMRR
Common-mode rejection
ratio
VS = 16 V, (V–) – 0.1 V < VCM < (V+)
– 2 V (Main input pair)
TA = –40°C to 125°C
99
130
dB
VS = 4 V, (V–) – 0.1 V < VCM < (V+)
– 2 V (Main input pair)
84
100
VS = 2.7 V, (V–) – 0.1 V < VCM <
(V+) – 2 V (Main input pair)(2)
75
95
VS = 2.7 V to 16 V, (V+) – 1 V < VCM
< (V+) + 0.1 V (Aux input pair)
85
INPUT CAPACITANCE
ZID
Differential
100 || 3
MΩ || pF
ZICM
Common-mode
6 || 1
TΩ || pF
www.ti.com
TLV9151, TLV9152, TLV9154
SBOS986E – OCTOBER 2019 – REVISED JANUARY 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: TLV9151 TLV9152 TLV9154



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