ADA4356ABCZ datasheet(9/61 Pages) AD

部件名	ADA4356ABCZ

功能描述	Programmable Transimpedance, Current to Bits Receiver μModule

PDF	61 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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9 / 61 page

Data Sheet

ADA4356

analog.com

Rev. 0

9 of 61

Figure 4. On-Chip LDO Disabled

Table 3. CLK, SPI, and Control Specifications

(TA = 25°C, VCC = 3.3V, and LDO enabled (see the power scheme shown in Figure 3), unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CLOCK INPUTS (CLKP AND CLKN)

External Clock Frequency

1000

MHz

Conversion Rate

125

MSPS

Logic Compliance

MOS,

LVDSL,

VPECL

Differential Input Voltage

For LVDS and

LVPECL

0.2

3.6

Vp-p

Input Voltage Range

GND − 0.2

VEA + 0.2

Input Common-Mode

Voltage

VCM

0.9

Input Resistance

(Differential)

RIN,CLK

kΩ

Input Capacitance

CIN,CLK

SPI CLOCK

SCLK Frequency

MHz

SPI INPUTS (SCLK, CS

̅̅̅̅

, AND SDIO)

Input High Voltage

VINH

1.2

VEA + 0.2

Input Low Voltage

VINL

0.8

SCLK Input Resistance

RIN,SCLK

kΩ

SCLK Input Capacitance

CIN,SCLK

̅̅̅̅

Input Resistance

RIN,CS

kΩ

̅̅̅̅

Input Capacitance

CIN,CS

VLD

VLDEN

VCC

3.3V

1.8V

IVCC

VEA

VED

ADA4356

LDO

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