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ADA4356ABCZ 数据表(PDF) 21 Page - Analog Devices

部件名 ADA4356ABCZ
功能描述  Programmable Transimpedance, Current to Bits Receiver μModule
PDF  61 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADA4356ABCZ 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADA4356
analog.com
Rev. 0
21 of 61
BALL
NAME
DESCRIPTION
TYPE
F7
VLDEN
VLD Output Enable. Set VLDEN = 1 to enable the
VLD output.
DI4
A6
FSEL
LPF Bandwidth Select. FSEL selects 100MHz
(FSEL = 0) or 1.0MHz (FSEL = 1) LPF bandwidth.
DI4
A10
CS
̅̅̅̅
Chip Select. Set CS
̅̅̅̅
= 0 to enable SPI mode.
CS
̅̅̅̅
has an internal 15kΩ pull-up resistor.
DI4
B11
SDIO
Serial Data Input/Output. In SPI mode, SDIO is a
bidirectional SPI data input/output with a 31kΩ
internal pull-down resistor.
DIO5
A11
SCLK
SPI Clock Input in SPI Mode. SCLK has a 30 kΩ
internal pull-down resistor.
DI4
D13, D14
DCON, DCOP
Data Clock Outputs, Differential LVDS Signal.
DO6
C13, C14
FCON, FCOP
Frame Clock Outputs, Differential LVDS Signal.
DO6
B13, B14
D1AN, D1AP
Lane 1 Digital Outputs, Differential LVDS Signal.
DO6
A13, A14
D0AN, D0AP
Lane 0 Digital Outputs, Differential LVDS Signal.
DO6
F11, E11
CLKP, CLKN
ADC Sampling Clock Inputs, Differential LVDS
Signal.
DI4
A4, A5
GSEL0,
GSEL1
TIA Gain Selection. For the truth table, see Table
11.
DI4
E1
INPUT
Analog Input. Input to Programmable Gain
Transimpedance Amplifier (PGTIA).
AI7
A2, A7, A9, B7, B8,
D2, D7,D8, D9,
E4, E5, E8, E13, E14,
F2, F10, F13, F14
DNC
Do Not Connect. These balls are reserved.
N/A8
1
P means power.
2
AO means analog output.
3
PO means power output.
4
DI means digital input.
5
DIO means digital input/output.
6
DO means digital output.
7
AI means analog input.
8
N/A means not applicable.



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