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TMUX1308DYYR 数据表(PDF) 29 Page - Texas Instruments |
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TMUX1308DYYR 数据表(HTML) 29 Page - Texas Instruments |
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29 / 46 page ![]() 10.3 Design Requirements For this design example, use the parameters listed in Table 10-1. Table 10-1. Design Parameters PARAMETERS VALUES Supply (VDD) 5.0 V I/O signal range 0 V to VDD (Rail to Rail) Control logic thresholds 1.8 V compatible 10.4 Detailed Design Procedure The TMUX1308 and TMUX1309 can operate without any external components except for the supply decoupling capacitors. If the parts desired power-up state is disabled, then the enable pin should have a weak pull-up resistor and be controlled by the MCU through the GPIO. All inputs being muxed to the ADC of the MCU must fall within the recommended operating conditions of the TMUX1308 and TMUX1309, including signal range and continuous current. For this design with a supply of 5 V, the signal range can be 0 V to 5 V; the maximum continuous current can be 100 mA at an ambient temperature of 85°C or 25 mA at 125°C. 11 Power Supply Recommendations The TMUX1308 and TMUX1309 devices operate across a wide supply range of 1.62 V to 5.5 V. Note: do not exceed the absolute maximum ratings because stresses beyond the listed ratings can cause permanent damage to the devices. Power-supply bypassing improves noise margin and prevents switching noise propagation from the VDD supply to other components. Good power-supply decoupling is important to achieve optimum performance. For improved supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from VDD to ground. Place the bypass capacitors as close to the power supply pins of the device as possible using low-impedance connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that offer low equivalent series resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias for connecting the capacitors to the device pins may offer superior noise immunity. The use of multiple vias in parallel lowers the overall inductance and is beneficial for connections to ground planes. 12 Layout 12.1 Layout Guidelines When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self-inductance of the trace which results in the reflection. Not all PCB traces can be straight; therefore, some traces must turn corners. Figure 12-1 shows progressively better techniques of rounding corners. Only the last example (BEST) maintains constant trace width and minimizes reflections. WORST BETTER BEST 1W min. W Figure 12-1. Trace Example www.ti.com TMUX1308, TMUX1309 SCDS426E – MARCH 2020 – REVISED OCTOBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: TMUX1308 TMUX1309 |
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