ADMV8809ACCZ-R7 datasheet(7/54 Pages) AD

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Data Sheet

ADMV8809

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 7 of 54

Figure 3. Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 3 to 6, 8 to 10, 13,

14, 20, 26, 27, 29 to

32, 34 to 37, 39 to

41, 43, 45, 47, 48, 50

to 52

GND

Ground. Connect the GND pins to the RF and DC ground.

BYP1

Bypass Pin 1. BYP1 is DC-coupled and matched to 50Ω. Do not apply an external voltage to BYP1.

RF1

RF Pin 1. RF1 is DC-coupled and matched to 50Ω. Do not apply an external voltage to RF1.

VDD

The 3.3V Power Supply Pin. Place 0.1μF and 100pF decoupling capacitors close to VDD.

CREG

The 2.5V Power Supply Pin. Place 47μF, 0.1μF, and 100pF decoupling capacitors close to CREG.

RST

Chip Reset, 3.3V Logic. Active low. The RST pin is internally pulled low with a 268kΩ resistor

SCLK

SPI Clock, 3.3V Logic. The SCLK pin is internally pulled low with a 268kΩ resistor.

SPI Chip Select, 3.3V Logic. Active low. The CS pin is internally pulled low with a 260kΩ resistor.

SDO

SPI Data Output, 3.3V Logic. The SDO pin is a tristate buffer.

SDI

SPI Data Input, 3.3V Logic. The SDI pin is internally pulled low with a 268kΩ resistor.

LUT0

Filter Address Bit 0, 3.3V logic. The LUT0 pin is internally pulled high with a 268kΩ resistor.

LUT1

Filter Address Bit 1, 3.3V logic. The LUT1 pin is internally pulled high with a 268kΩ resistor.

LUT2

Filter Address Bit 2, 3.3V logic. The LUT2 pin is internally pulled high with a 268kΩ resistor.

LUT3

Filter Address Bit 3, 3.3V logic. The LUT3 pin is internally pulled high with a 268kΩ resistor.

LUT4

Filter Address Bit 4, 3.3V logic. The LUT4 pin is internally pulled high with a 268kΩ resistor.

VSS

The –2.5V Power Supply Pin. Place 0.1μF and 100pF decoupling capacitors close to VSS.

RF2

RF Pin 2. RF2 is DC-coupled and matched to 50Ω. Do not apply an external voltage to RF2.

BYP2

Bypass Pin 2. BYP2 is DC-coupled and matched to 50Ω. Do not apply an external voltage to BYP2.

ADD3

Chip Address Bit 3, 3.3V logic. The ADD3 pin is internally pulled high with a 268kΩ resistor.

ADD2

Chip Address Bit 2, 3.3V logic. The ADD2 pin is internally pulled high with a 268kΩ resistor.

ADD1

Chip Address Bit 1, 3.3V logic. The ADD1 pin is internally pulled high with a 268kΩ resistor.

ADD0

Chip Address Bit 0, 3.3V logic. The ADD0 pin is internally pulled high with a 268kΩ resistor.

EPAD

Exposed Pad. The exposed pad must be connected to the RF and DC ground.

ADMV8809ACCZ-R7 数据表(PDF) 7 Page - Analog Devices

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