ADC34RF72 datasheet(1/74 Pages) TI2

部件名	ADC34RF72

功能描述	ADC32RF72 Dual Channel 1.5GSPS 16-bit RF Sampling ADC

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制造商	TI2 [Texas Instruments]

网页	https://www.ti.com

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ADC32RF72 Dual Channel 1.5GSPS 16-bit RF Sampling ADC

1 Features

• 16-bit, dual channel 1.5GSPS ADC

• Noise spectral density: -163.7dBFS/Hz

• Thermal Noise: 75.6dBFS

• Noise figure: 14.4dB

• Single core (non-interleaved) ADC architecture

• Aperture jitter: 40fs

• Buffered analog inputs

• Input fullscale: 1.44Vpp (4.1dBm)

• Full power input bandwidth (-3dB): 1.8GHz

• Ultra-low close-in residual phase noise:

– −140dBc/Hz at 10kHz offset at 1GHz

• Spectral performance (fIN = 1GHz, -1dBFS):

– SNRflat: 72.1dBFS

– HD2,3: 68dBc

– Non HD2,3: 93dBFS

• 192-tap/ch programmable FIR equalizer filter

• 12-bit Fractional delay filter

• Digital down-converters (DDCs)

– Up to 8 DDC

– Complex output: /2, /3, /4, /5 to /32768

decimation

– 48-bit NCO phase coherent frequency hopping

– Fast frequency hopping: < 1μs

• JESD204B/C serial data interface

– Maximum lane rate: 24.75Gbps

• Code error rate (CER): 1E-15 errors/sample

• Power consumption: 1.5W/channel (1.5GSPS)

2 Applications

• Phased array radar

• Wafer Inspection

• Spectrum analyzer

• Software defined radio (SDR)

• Electronic warfare

• High-speed digitizer

• Cable infrastructure

• Communications infrastructure

3 Description

The ADC32RF72 is a 16-bit, 1.5GSPS (non-

interleaved), dual channel analog to digital converter

(ADC). The device is designed for the highest signal-

to-noise ratio (SNR) and delivers a noise spectral

density of −163.7dBFS/Hz. Using internal averaging

modes, the NSD can be improved to as low as

-166.2dBFS/Hz. The buffered analog inputs support

a programmable internal termination impedance of

50, 100, 200Ω with a full power input bandwidth of

1.8GHz (−3dB). The device lets the user select one

input from IN1/2/3 in addition to IN0.

The device includes several digital processing

features such as a 192-tap/ch programmable FIR filter

for equalization, a 12-bit fractional delay filter as well

as multiple digital down converters (DDCs). There

are eight DDCs supporting decimation factors of /2, /3

and /5 up to /32768. The 48-bit NCOs support phase

coherent frequency hopping.

The ADC32RF72 supports the JESD204B/C serial

data interface with interface rates up to 24.75Gbps.

The power efficient ADC architecture consumes

1.5W/ch at 1.5GSPS and provides power scaling with

lower sampling rates.

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

ADC32RF72

FCCSP

13.8mm x 13.8mm

(1)

For more information, see Section 11.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

Device Comparison

PART NUMBER

# OF CHANNELS

ADC32RF72

2

ADC34RF72

4

SPI

GPIO1...23

RESET

IN0P/N

SYSREFP/N

CLKP/N

SPI Registers and Device Control

SYSREF

MONITOR

STX0..7P/N

JESDCLKP/N

LR/

(8·k)

DIGITAL SIGNAL PROCESSING

- 96-tap/ch FIREQ

- Fractional Delay Filter

- 8x DDC /2,/3,/4,/5../32768

IN1P/N

IN2P/N

IN3P/N

ADC

Block Diagram

ADC32RF72

SBASAL2 – NOVEMBER 2025

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

类似零件编号 - ADC34RF72

制造商	部件名	数据表	功能描述
Texas Instruments	ADC34RF72	4Mb / 73P	ADC34RF72 Quad Channel 16-bit 1.5GSPS RF Sampling Data Converter AUGUST 2025
Texas Instruments	ADC34RF72IANH	4Mb / 73P	ADC34RF72 Quad Channel 16-bit 1.5GSPS RF Sampling Data Converter AUGUST 2025

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