24LC024 datasheet(13/41 Pages) MICROCHIP

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DS20001210Q-page 13

24AA024/24LC024/24AA025/24LC025

8.0

READ OPERATIONS

Read operations are initiated in the same way as write

operations, with the exception that the R/W bit of the

client address is set to ‘1’. There are three basic types

of read operations: current address read, random read

and sequential read.

8.1

Current Address Read

The 24AA024/24LC024/24AA025/24LC025 contains

an Address Pointer that maintains the address of the

last word accessed, internally incremented by one.

Therefore, if the previous read access was to address

‘n’, the next current address read operation would

access data from address n + 1. Upon receipt of the

client address with the R/W bit set to ‘1’, the 24AA024/

24LC024/24AA025/24LC025 issues an acknowledge

and transmits the 8-bit data word. The host will not

acknowledge the transfer, but generate a Stop

condition, which causes the 24AA024/24LC024/

24AA025/24LC025

discontinue

transmission

(Figure 8-1).

8.2

Random Read

Random read operations allow the host to access any

memory location in a random manner. To perform this

type of read operation, the word address must first be

set. This is accomplished by sending the word address

to the 24AA024/24LC024/24AA025/24LC025 as part

of a write operation. Once the word address is sent, the

host generates a Start condition following the

acknowledge. This terminates the write operation, but

not before the internal Address Pointer is set. The host

then issues the control byte again, but with the R/W bit

set to a ‘1’.

The 24AA024/24LC024/24AA025/24LC025 will then

issue an acknowledge and transmit the 8-bit data word.

The host will not acknowledge the transfer, though it

does generate a Stop condition, which causes the

24AA024/24LC024/24AA025/24LC025 to discontinue

transmission (Figure 8-2). After this command, the

internal Address Pointer will point to the address

location following the one that was just read.

8.3

Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the 24AA024/24LC024/

24AA025/24LC025 transmits the first data byte, the

host issues an acknowledge (as opposed to a Stop

condition in a random read). This directs the 24AA024/

24LC024/24AA025/24LC025 to transmit the next

sequentially addressed 8-bit word (Figure 8-3).

To provide sequential reads, the 24AA024/24LC024/

24AA025/24LC025 contains an internal Address

Pointer that is incremented by one upon completion of

each operation. This Address Pointer allows the entire

memory contents to be serially read during one

operation.

The

internal Address

Pointer

will

automatically roll over from address 0FFh to address

000h.

FIGURE 8-1:

CURRENT ADDRESS READ

Bus Activity

Host

SDA Line

Bus Activity

Control

Byte

Data (n)

Block

Select

Bits

101 0 A0 A1 A2 1

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