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L6205PD 数据表(PDF) 12 Page - STMicroelectronics |
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L6205PD 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 21 page ![]() L6205 12/21 APPLICATION INFORMATION A typical application using L6205 is shown in Fig. 11. Typical component values for the application are shown in Table 2. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power pins (VSA and VSB) and ground near the L6205 to improve the high frequency filtering on the power supply and reduce high frequency transients generated by the switching. The capacitors connected from the ENA and ENB inputs to ground set the shut down time for the Brgidge A and Bridge B respectively when an over current is detected (see Overcurrent Protection). The two current sources (SENSEA and SENSEB) should be connected to Power Ground with a trace length as short as possible in the layout. To increase noise immunity, unused logic pins (except ENA and ENB) are best connected to 5V (High Logic Level) or GND (Low Logic Level) (see pin description). It is recommended to keep Power Ground and Signal Ground separated on PCB. Table 2. Component Values for Typical Application Figure 11. Typical Application C1 100uF D1 1N4148 C2 100nF D2 1N4148 CBOOT 220nF RENA 100k Ω CP 10nF RENB 100k Ω CENA 5.6nF RP 100 Ω CENB 5.6nF OUT1A 4 18 16 15 7 13 OUT2A GND GND GND GND OUT2B OUT1B VSA POWER GROUND SIGNAL GROUND + - VS 8-52VDC VSB VCP VBOOT C1 SENSEA 17 6 5 ENB CENB RENB ENABLEB 11 14 3 12 19 SENSEB LOADA LOADB 8 ENA CENA RENA ENABLEA 20 D02IN1345 1 IN1A IN2A IN1A IN2A 2 IN2B 10 IN1B IN2B IN1B 9 CP CBOOT RP D2 D1 C2 |
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