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AD8067ART-R2 数据表(PDF) 21 Page - Analog Devices |
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AD8067ART-R2 数据表(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() AD8067 Rev. A | Page 21 of 24 FREQUENCY – MHz 44 24 26 28 30 32 34 36 38 40 42 0.1 1 10 100 AD8067 C2 0.1 μF 1 C1 10 μF +5V –5V 5 2 4 3 AD8009 C6 0.001 μF 6 C8 0.1 μF +5V 7 2 3 4 C11 0.01 μF C10 0.001 μF –5V C3 10 μF C4 0.1 μF INPUT R4 200 Ω R3 21.5 Ω OUTPUT R5 50 Ω R1 51.1 Ω R2 4.99k Ω C7 10 μF C9 10 μF C5 5pF Figure 57. AD8067/AD8009 Composite Amplifier AV = 100, GBWP = 6.1 GHz Figure 58. Gain Bandwidth Response The composite amplifier is set for a gain of 100. The overall gain is set by M 25ns CH1 0V CH1 1V T C1 AMPL 4V 1 + = R1 R2 V V I O The output stage is set for a gain of 10; therefore, the AD8067 has an effective gain of 10, thereby allowing it to maintain a bandwidth in excess of 55 MHz. The circuit can be tailored for different gain values; keeping the ratios roughly the same ensures that the bandwidth integrity is maintained. Depending on the board layout, Capacitor C5 can be required to reduce ringing on the output. The gain bandwidth and pulse responses are shown in Figure 58, Figure 59, and Figure 60. Figure 59. Large Signal Response Layout of this circuit requires attention to the routing and length of the feedback path. It should be kept as short as possible to minimize stray capacitance. M 25ns CH1 0V C1 AMPL 480mV CH1 200mV T Figure 60. Small Signal Response |
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