Data Sheet

ADMV8809

REGISTER DETAILS

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Rev. A | 53 of 55

Table 91. Bit Descriptions for LUTA_30_FILTER

Bits

Bit Name

Description

Reset

Access

[7:6]

LUTA_30_FILTER_POINTER

LUTA_30_Filter Pointer.

0x0

R/W

[5:3]

LUTA_30_HPF

LUTA_30_HPF State.

0x0

R/W

[2:0]

LUTA_30_LPF

LUTA_30_LPF State.

0x0

R/W

Address: 0x5E, Reset: 0x00, Name: LUTA_31_SW

Figure 151.

Table 92. Bit Descriptions for LUTA_31_SW

Bits

Bit Name

Description

Reset

Access

[7:3]

RESERVED

Reserved.

0x0

R

[2:0]

LUTA_31_SW_SELECT

LUTA_31_Switch Select.

0x0

R/W

Address: 0x5F, Reset: 0x00, Name: LUTA_31_FILTER

Figure 152.

Table 93. Bit Descriptions for LUTA_31_FILTER

Bits

Bit Name

Description

Reset

Access

[7:6]

LUTA_31_FILTER_POINTER

LUTA_31_Filter Pointer.

0x0

R/W

[5:3]

LUTA_31_HPF

LUTA_31_HPF State.

0x0

R/W

[2:0]

LUTA_31_LPF

LUTA_31_LPF State.

0x0

R/W

Note: LUTB_0 to LUTB_31 bit field functionality (Register 0x60 through Register 0x9F) is similar to LUTA_0 to LUTA_31 (Register 0x20

through Register 0x5F).

Address: 0xA0, Reset: 0x00, Name: BAND1_DEFAULT

Figure 153.

Table 94. Bit Descriptions for BAND1_DEFAULT

Bits

Bit Name

Description

Reset

Access

[7:6]

RESERVED

Reserved.

0x0

R

[5:3]

HPF1_DEFAULT

HPF1 default setting in transparent parallel mode.

0x0

R/W

[2:0]

LPF1_DEFAULT

LPF1 default setting in transparent parallel mode.

0x0

R/W

Address: 0xA1, Reset: 0x00, Name: BAND2_DEFAULT