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L6260 数据表(PDF) 3 Page - STMicroelectronics

部件名 L6260
功能描述  4.5 – 5.5V DISK DRIVER SPINDLE & VCM, POWER & CONTROL COMBO?셎
PDF  30 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L6260 数据表(HTML) 3 Page - STMicroelectronics

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PIN DESCRIPTION
Pin Types: I = Input, O = Output, P = Power, A = Analog (passive)
Power
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
I\O
MAPPED?
TRI-STATE
@SLEEP/@POR
8
VDC
Digital power. Positive nominally 5V or 3V
AI
No
No
41
VCC
Analog power. Positive nominally 5V or 3V
AI
No
No
54
VVCM_1
VCM power supply. Positive nominally 5V or 3V
AI
No
No
58
VVCM_2
Same as above
AI
No
No
23
VSPIN_1
Spindle power pin. Positive nominally 5V or 3V
AI
No
No
31
VSPIN_2
Same as above
AI
No
No
1
GND
Ground
AI
No
No
15-17
GND
Ground
AI
No
No
32-34
GND
Ground
AI
No
No
47-49
GND
Ground
AI
No
No
18
SPN_GND_1
Ground for spindle circuit
AI
No
No
27
SPN_GND_2
As above
AI
No
No
44
DAC_GND
Ground for all DACs
AI
No
No
45
AGND
Analog ground
AI
No
No
7
DIG_GND
Digital ground
AI
No
No
63
TRIPGND
Voltage tripler ground
AI
No
No
Serial Interface & Test Pins
PIN #
PIN NAME
DESCRIPTION
PIN
TYPE
I\O
MAPPED?
TRI-STATE
@SLEEP/@POR
12
FCLCK
System clock. 4-12MHz selectable via the
CLK_PRESCALE bit in the System Control Register
B (Reg 4 Bit 4).
DI
Yes
No
11
SDIO
Serial port data I/O running up to 10MHz. For full
details of all serial port signals see the Circuit
Description section.
DI/O
Yes
Yes
10
SCLK
Serial port clock (max 10Mbits/s)
DI
Yes
No
19
R/W
Read / Write signal for serial interface
DI
Yes
No
9
SLOAD
Chip select input.
DI
Yes
No
21
TEST
Used to enable one of the test modes. The mode is
selcted in conjunction with the TRISTATE pin (see
below for more details).
DI
No
No
24
TRISTATE
Used to enable one of the test modes. The mode is
selcted in conjunction with the TEST pin (see below
for more details). This pin has no effect on the
spindle or VCM drivers, this is a test pin only.
DI
No
No
60
ATEST
Analog test pin. This pin carries the required analog
signal to allow external testing.
AO
No
No
26
DTEST
Digital Test Output Pin. This pin also doubles as the
Clock input if an external FLL is used.
DI/O
No
No
Test Mode
TEST pin TRISTATE pin
IOMAPPING Test
1
0
DIGITAL Test*
1
1
ANALOG Test*
1
1
TRISTATE Test
0
1
Normal Operation (non
test mode)
00
For a detailed description please refer to the Test
Circuit section of the CIRCUIT OPERATION por-
tion of this datasheet
* These two test modes operate simultaneously through separate
test pins (ATEST and DTEST).
L6260
3/30



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