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WILCS02 数据表(PDF) 15 Page - Microchip Technology |
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WILCS02 数据表(HTML) 15 Page - Microchip Technology |
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15 / 71 page  WILCS02IC and WILCS02 Family Device Overview Data Sheet © 2024-2025 Microchip Technology Inc. and its subsidiaries DS70005557C - 15 2.3 Basic Connection Requirement The WILCS02 Module requires attention to a minimal set of device pin connections before proceeding with development. Figure 2-4. WILCS02 Module Basic Connection and Interface Diagram GND VDD GND VDD 10k R7 VDD 0.1uF C4 GND RESET INTOUT PTA_BT_ACTIVE GND PTA_WLAN_ACTIVE PTA_BT_PRIO 1V5 TP1 UART2_TX VDD 0.1uF C2 4.7uF C1 GND GND 0R R11 GND 32.768kHz Y1 GND 18pF C5 18pF C6 0R R9 0R R8 DNP DNP 0R R10 SD_DATA0/SPI_SDO SD_DATA1/SPI_CS SD_DATA3/UART1_TX SD_CMD/SPI_CLK U1_RX TP3 U1_TX TP2 GND RESET 1 2 3 4 5 6 J1 1x6_Header DFU_RX/STRAP1 DFU_TX/STRAP2 RESET I/O DNP DNP DNP 10K DNP R3 100K R4 10K DNP R1 100K R2 WILCS02_MODULE NC 1 RESERVED 2 RESERVED 3 MCLR 4 PTA_WLAN_ACTIVE 5 PTA_BT_PRIO 6 RESERVED 7 NC 8 DFU_RX/STRAP1 10 RESERVED 11 INTOUT 13 SD_DATA3/UART1_TX 14 SD_DATA2/SDI1 15 SD_DATA1/CS1 16 SD_DATA0/SDO1 17 SD_CMD/SCK1 18 SD_CLK/UART1_RX 19 RTCC_OSC_IN/PTA_BT_ACTIVE 21 RTCC_OSC_OUT 22 TP 24 NC 25 DFU_TX/STRAP2 26 UART2_TX 27 U1 SD_CLK/UART1_RX SD_DATA2/SPI_SDI 5 SW1 0.1uF C3 10k R6 0R R5 VDD GND GND DNP DNP DNP DNP NOTE on UART1: U1_TX and U1_RX will be required for External antenna calibration for some antennas NOTE on Strap pins for Host Interface Selection: Strap1: Pull low for SDIO; Pull high for SPI Strap2: Recommended to pull high for future upgrades NOTE on UART2: For printing Firmware Debug Logs NOTE on TP Test Point: 1.5V Output from PMU; To confirm internal PMU is working fine NOTE on PTA: For coexistance with a Bluetooth Device NOTE on Supply Pins: 2 supply pins VDD & VDDIO (3 - 3.6V) NOTE on Host Interface: SDIO/SPI can be chosen as the host interface based on Strap1 & 2 Pin configurations NOTE on RTCC OSC: RTCC OSC can be used if coexistance with Bluetooth device is not a requirement for end application NOTE on DFU: For Device Firmware Update. Add a 2.54mm pitch 1x6 male header to use with a standard USB to UART converter cable for DFU; Otherwise, Add test points only for the 4 required signals NOTE on User Button: Placeholder for User Button recommended for future use 2.3.1 Power Supply Pin It is recommended to add a bulk and a decoupling capacitor at the input supply Pin 20 (VDD), Pin 23 (VDDIO) and GND of the WILCS02 Module. Figure 2-5. Recommended Module Power Supply Connections VDD VDDIO WILCS02 0.1 µF 4.7 µF GND C1 C2 4.7 µF C1 GND 0.1 µF GND C3 The value of the C1, C2 and C3 capacitors may vary based on the application requirements and source of supply voltage. The C1, C2 and C3 capacitors must be placed close to the pin. 2.3.2 Master Clear (MCLR) Pin The MCLR pin works as a device Reset. |
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