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L9230 数据表(PDF) 5 Page - STMicroelectronics |
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L9230 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 25 page ![]() 5/25 L9230 (*) For lower pull up resistances than 27k Ω the specified value of xxxV (minimum) is guaranteed by design Note: 1. In case of SC OUTx to Vs the switch off current is always higher than the start value of current regulation ( ∆|IOUK| = |IOUK| - |IOUmax| 2. Guaranteed by design 3. Value is tested down to 6V. For supply voltage below 6V on increased current can be fed back in the device via a protection path Timing f PWM Frequency min. operating time 10 µs 2 30 kHz fS Switching Frequency during current limitation 5 30 kHz tdon Output ON-delay IN1 --> OUT1 or IN2 --> OUT2 35 µs tdoff Output OFF-delay 3 5 µs tr, tf Output rise-, fall Time OUT1H--> OUT1L, OUT2H--> OUT2L, IOUT = 3 A OUT1L--> OUT1H, OUT2L--> OUT2H 0.2 0.4 1 µs tddis Disable Delay Time DIn --> OUTn, En --> OUTn 3 4 µs tdp Power on Delay Time VS = on --> output stage active 15 ms Delay time for fault detection 5 15 µs | ∆I| Effect of reverse current at power supply 4,5V < VDMS < 5,5V - IVs < 3A ∆I for ISI, ISO, ISS, ISCK, IIN1, IIN2, IEN,IDI 100 µA ELECTRICAL CHARACTERISTCS ( Tj = -40 to +150°C; VS = 5 to 28V) (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit |
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