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SMC032AF 数据表(PDF) 49 Page - Numonyx B.V |
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SMC032AF 数据表(HTML) 49 Page - Numonyx B.V |
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49 / 82 page ![]() SMCxxxAF CF-ATA registers 49/82 8.10 Device control register (address 3F6h [376h]; offset Eh) This write-only register is used to control the CompactFlash memory card interrupt request and to issue an ATA soft reset to the card. This register can be written even if the device is BUSY. The bits are defined as follows: 8.10.1 Bit 7 to 3 Don’t care. The host should reset this bit to ‘0’. 8.10.2 Bit 2 (SW Rst) This bit is set to ‘1’ in order to force the CompactFlash storage card to perform an AT Disk controller Soft Reset operation. This clears status register and writes diagnostic code in error register after a write or read sector error. The card remains in reset until this bit is reset to ‘0.’ 8.10.3 Bit 1 (–IEn) When the Interrupt Enable bit is set to ‘0’, –IREQ interrupts are enabled. When the bit is set to ‘1’, interrupts from the card are disabled. This bit also controls the Int bit in the card configuration and status register. It is set to ‘0’ at power-on. 8.10.4 Bit 0 This bit is set to ‘0’. Table 43. Status & alternate status register D7 D6 D5 D4 D3 D2 D1 D0 BUSY RDY DWF DSC DRQ CORR 0 ERR Table 44. Device control register D7 D6 D5 D4 D3 D2 D1 D0 X(0) X(0) X(0) X(0) X(0) SW Rst –IEn 0 |
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