2

SP5669

RF

1 BIT

17 BIT LATCH

4 BIT

LATCH AND

PORT

INTERFACE

I

TRANSCEIVER

CRYSTAL

PUMP

DRIVE

ADDRESS

ADC

SDA

SCL

PORT P3

PORT P2

INPUTS

13

14

4

5

6

11

PROGRAMMABLE

DIVIDER

PUMP

REFERENCE

DIVIDER

PHASE

COMP

2 BIT

OSC

2

1

16

15

12 V

CC

9

8

7

2/1

13 BIT

COUNT

4 BIT

COUNT

4 BIT

10

PORT P1 PORT P0

16/17

3 REF/COMP

3 BIT ADC

PE

5 BIT LATCH and

MODE CONTROL

LOGIC

(see Fig. 5)

CHARGE

LATCH

LATCH

LOCK

DETECT

LATCH

DIVIDE RATIO

PRE

AMP

F

P0 TEST

CONTROL

POWER ON

DETECT

POR

C

2

CHARGE

(see Fig. 3)

F

pd

Fig. 2 Block diagram

ELECTRICAL CHARACTERISTICS

T amb = –20

°C to +80°C, V

either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless

otherwise stated.

Characteristics

Pin

Value

Units

Conditions

Min

Typ

Max

Supply current, I

CC

12

68

85

mA

V

58

73

mA

V

RF input voltage

13, 14

40

300

mV rms

300MHz to 2.7GHz Prescaled

enabled, PE = 1, See Fig. 7b.

13, 14

100

300

mV rms

80MHz Prescaler enabled,

PE=1, See Fig. 7b.

13,14

50

300

mV rms

80MHz to 2.0GHz Prescaler

disabled, PE = 0, See Fig. 7a.

RF input impedance

13, 14

50

Ω

Refer to Fig. 13

RF input capacitance

13, 14

2

pF

Refer to Fig. 13