CE6313

Data Sheet

2

Intel Corporation

Figure 2 - CE6313 Pin Allocation

Notes: All supply pins must be connected as they are not all commoned internally.

Pin Table

No.

Name

No.

Name

No.

Name

No.

Name

1

Reset

17

CVdd

33

Gnd

49

MDO[1]

2

1. Can be programmed to be MICLK (MPEG input clock) instead.

18

Gnd

34

CVdd

50

CVdd

3

DiSEqC[1]

19

XTI

35

Addr[1]

51

Gnd

4

DiSEqC[0]

20

XTO

36

Addr[2]

52

MDO[2]

5

Vdd

21

Gnd

37

Addr[3]

53

MDO[3]

6

Gnd

22

CVdd

38

Addr[4]

54

Gnd

7

CVdd

23

Gnd

39

Vdd

55

Vdd

8

Gnd

24

Iin

40

Gnd

56

MDO[4]

9Sleep

25

Iin

41

AGC

57

MDO[5]

10

CLK1

26

Gnd

42

Test

58

Gnd

11

DATA1

27

Vdd

43

IRQ 1

59

CVdd

12

CVdd

28

Gnd

44

CVdd

60

MDO[6]

13

Gnd

29

Qin

45

Gnd

61

MDO[7]

14

DATA2

30

Qin

46

MOSTRT

62

MOCLK

15

CLK2

31

Gnd

47

MOVAL

63

BKERR

16

OscMode

32

CVdd

48

MDO[0]

64

Status