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CE6313 数据表(PDF) 5 Page - Intel Corporation |
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CE6313 数据表(HTML) 5 Page - Intel Corporation |
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5 / 24 page ![]() CE6313 Data Sheet 5 Intel Corporation Overview The CE6313 is a QPSK/BPSK 1 - 45 MSps demodulator and channel decoder for digital satellite television transmissions compliant to both DVB-S and DSS standards and other systems, such as LMDS, that use the same architecture. A Command Driven Control (CDC) system is provided making the CE6313 very simple to program. After the tuner has been programmed to the required frequency to acquire a DVB transmission, the CE6313 requires a minimum of five registers to be written. The CE6313 provides a monitor of bit error rate after the QPSK module and also after the Viterbi module. For receiver installation, a high speed scan or 'blind search' mode is available. This allows all signals from a given satellite to be evaluated for frequency, symbol rate and convolutional coding scheme. The phase of the IQ signals can be automatically determined. Full DiSEqC is provided for both writing and reading DiSEqC messages. Storage in registers for up to eight data bytes sent and eight data bytes received is provided. Figure 3 - CE6313 Functional Block Diagram I I/P Q I/P Dual ADC De-rotator Decimation Filtering Timing recovery Matched filter Phase recovery MPEG/ DSS Packets Bus I/O 2-wire Bus Interface Acquisition Control Clock Generation Analog AGC Control DVB DSS FEC |
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