CE6313

Data Sheet

21

Intel Corporation

4.6

CE6313 Pinout Description

Input low level

Vil

0.8

V

Input high level

Vih

2.0

V

Input leakage

Vin = 0 or Vdd

±1

µA

Input capacitance

Excludes packaging contribution

(~0.35 pF)

1.5

pF

1. For minimum power, MPEG outputs should be tristated and ADCs powered down.

AC Electrical Characteristics

Parameter

Conditions/Pin

Min.

Typ.

Max.

Unit

ADC Full-scale input single range

(single-ended or differential)

Differential source is

recommended

0.5

1.0

Vpp

ADC analog input resistance

Per input pin

10

k

Ω

ADC analog input capacitance

Per input pin

2

pF

ADC input common mode voltage level

0.7

1.7

V

System clock frequency

30.00

100

MHz

1. When not using a crystal, XTI may be driven from an external source over the frequency range shown.

2. The upper limit is set by DiSEqC requirements. If DiSEqC is not required, then external frequencies up to 27.00 MHz can be used.

3.99

22.66

MHz

Crystal oscillator frequency

See Section 4.4 for details

9.99

16.01

MHz

(with 10 MHz xtal or above)

3. The maximum serial clock speed on the primary 2-wire bus is related to the input clock frequency and is limited to 100 kHz with a

4.0 MHz clock.

400

kHz

MPEG clock input frequency

On either pin #2 or pin #43

4. Must be calculated from the data input rate.

5. Also subject to system clock limitations.

MHz

Pin Description Table

Pin

Name

Description

I/O

Note

V

mA

1Reset

Active low reset input

I

5

2

DiSEqC[2]

DiSEqC input for level 2 control. Also usable as

GPP2 (general purpose port pin) for other purposes,

and as MICLK - external clock input for MPEG data.

I/O

Open

56

3

DiSEqC[1]

Horizontal/vertical LNB control (acts as input only in

production test modes)

I/O

CMOS

3.3

2

4

DiSEqC[0]

22 kHz output to LNB (acts as input only in

production test modes)

I/O

CMOS

3.3

2

DC Electrical Characteristics (continued)

Parameter

Conditions/Pin

Symbol

Min.

Typ.

Max.

Unit