7/21

M29F800AT, M29F800AB

Note: X Don’t Care, PA Program Address, PD Program Data, BA Any address in the Block.

All values in the table are in hexadecimal.

The Command Interface only uses A–1, A0-A10 and DQ0-DQ7 to verify the commands; A11-A18, DQ8-DQ14 and DQ15 are Don’t Care.

Read/Reset. After a Read/Reset command, read the memory as normal until another command is issued.

Auto Select. After an Auto Select command, read Manufacturer ID, Device ID or Block Protection Status.

Program, Chip Erase, Block Erase. After these commands read the Status Register until the Program/Erase Controller completes and the

memory returns to Read Mode. Add additional Blocks during Block Erase Command with additional Bus Writ e Operations until the Timeout

Bit is set.

Erase Suspend. After the Erase Suspend command read non-erasing memory blocks as normal, issue Auto Select and Program commands

on non-erasing blocks as normal.

Erase Resume. After the Erase Resume command the suspended Erase operation resumes, read the Status Register until the Program/

Erase Controller completes and the memory returns to Read Mode.

Command

Bus Write Operations

1st

2nd

3rd

4th

5th

6th

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Read/Reset

1X

F0

3

555

AA

2AA

55

X

F0

Auto Select

3

555

AA

2AA

55

555

90

Program

4

555

AA

2AA

55

555

A0

PA

PD

Chip Erase

6

555

AA

2AA

55

555

80

555

AA

2AA

55

555

10

Block Erase

6+

555

AA

2AA

55

555

80

555

AA

2AA

55

BA

30

Erase Suspend

1

X

B0

Erase Resume

1

X

30

Command

Bus Write Operations

1st

2nd

3rd

4th

5th

6th

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Addr

Data

Read/Reset

1X

F0

3

AAA

AA

555

55

X

F0

Auto Select

3

AAA

AA

555

55

AAA

90

Program

4

AAA

AA

555

55

AAA

A0

PA

PD

Chip Erase

6

AAA

AA

555

55

AAA

80

AAA

AA

555

55

AAA

10

Block Erase

6+

AAA

AA

555

55

AAA

80

AAA

AA

555

55

BA

30

Erase Suspend

1

X

B0

Erase Resume

1

X

30

quires four Bus Write operations, the final write op-

eration latches the address and data in the internal

state machine and starts the Program/Erase Con-

troller.

If the address falls in a protected block then the

Program command is ignored, the data remains

unchanged. The Status Register is never read and

no error condition is given.

During the program operation the memory will ig-

nore all commands. It is not possible to issue any

command to abort or pause the operation. Typical

program times are given in Table 6. Bus Read op-

erations during the program operation will output

the Status Register on the Data Inputs/Outputs.

See the section on the Status Register for more

details.

After the program operation has completed the

memory will return to the Read mode, unless an

error has occurred. When an error occurs the

memory will continue to output the Status Regis-

ter. A Read/Reset command must be issued to re-

set the error condition and return to Read mode.

Note that the Program command cannot change a

bit set at ’0’ back to ’1’ and attempting to do so will

cause an error. One of the Erase Commands must

be used to set all the bits in a block or in the whole

memory from ’0’ to ’1’.