M29F800AT, M29F800AB

8/21

Chip Erase Command. The Chip Erase com-

mand can be used to erase the entire chip. Six Bus

Write operations are required to issue the Chip

Erase Command and start the Program/Erase

Controller.

If any blocks are protected then these are ignored

and all the other blocks are erased. If all of the

blocks are protected the Chip Erase operation ap-

pears to start but will terminate within about 100

µs,

leaving the data unchanged. No error condition is

given when protected blocks are ignored.

During the erase operation the memory will ignore

all commands. It is not possible to issue any com-

mand to abort the operation. Typical chip erase

times are given in Table 6. All Bus Read opera-

tions during the Chip Erase operation will output

the Status Register on the Data Inputs/Outputs.

See the section on the Status Register for more

details.

After the Chip Erase operation has completed the

memory will return to the Read Mode, unless an

error has occurred. When an error occurs the

memory will continue to output the Status Regis-

ter. A Read/Reset command must be issued to re-

set the error condition and return to Read Mode.

The Chip Erase Command sets all of the bits in un-

protected blocks of the memory to ’1’. All previous

data is lost.

Block Erase Command. The Block Erase com-

mand can be used to erase a list of one or more

blocks. Six Bus Write operations are required to

select the first block in the list. Each additional

block in the list can be selected by repeating the

sixth Bus Write operation using the address of the

additional block. The Block Erase operation starts

the Program/Erase Controller about 50

µs after the

last Bus Write operation. Once the Program/Erase

Controller starts it is not possible to select any

more blocks. Each additional block must therefore

be selected within 50

µs of the last block. The 50µs

timer restarts when an additional block is selected.

The Status Register can be read after the sixth

Bus Write operation. See the Status Register for

details on how to identify if the Program/Erase

Controller has started the Block Erase operation.

If any selected blocks are protected then these are

ignored and all the other selected blocks are

erased. If all of the selected blocks are protected

the Block Erase operation appears to start but will

terminate within about 100

µs, leaving the data un-

changed. No error condition is given when protect-

ed blocks are ignored.

During the Block Erase operation the memory will

ignore all commands except the Erase Suspend

and Read/Reset commands. Typical block erase

times are given in Table 6. All Bus Read opera-

tions during the Block Erase operation will output

the Status Register on the Data Inputs/Outputs.

See the section on the Status Register for more

details.

After the Block Erase operation has completed the

memory will return to the Read Mode, unless an

error has occurred. When an error occurs the

memory will continue to output the Status Regis-

ter. A Read/Reset command must be issued to re-

set the error condition and return to Read mode.

The Block Erase Command sets all of the bits in

the unprotected selected blocks to ’1’. All previous

data in the selected blocks is lost.

Erase Suspend Command. The Erase Suspend

Command may be used to temporarily suspend a

Block Erase operation and return the memory to

Read mode. The command requires one Bus

Write operation.

Table 6. Program, Erase Times and Program, Erase Endurance Cycles

Parameter

Min

Typical after

Max

Unit

Chip Erase (All bits in the memory set to ‘0’)

3

3

sec

Chip Erase

8

8

30

sec

Block Erase (64 Kbytes)

0.6

0.6

4

sec

Program (Byte or Word)

8

8

150

µs

Chip Program (Byte by Byte)

9

9

35

sec

Chip Program (Word by Word)

4.5

4.5

18

sec

Program/Erase Cycles (per Block)

100,000

cycles