M29F800AT datasheet(9/21 Pages) STMICROELECTRONICS

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M29F800AT, M29F800AB

The Program/Erase Controller will suspend within

µs of the Erase Suspend Command being is-

sued. Once the Program/Erase Controller has

stopped the memory will be set to Read mode and

the Erase will be suspended. If the Erase Suspend

command is issued during the period when the

memory is waiting for an additional block (before

the Program/Erase Controller starts) then the

Erase is suspended immediately and will start im-

mediately when the Erase Resume Command is

issued. It will not be possible to select any further

blocks for erasure after the Erase Resume.

During Erase Suspend it is possible to Read and

Program cells in blocks that are not being erased;

both Read and Program operations behave as

normal on these blocks. Reading from blocks that

are being erased will output the Status Register. It

is also possible to enter the Auto Select mode: the

memory will behave as in the Auto Select mode on

all blocks until a Read/Reset command returns the

memory to Erase Suspend mode.

Erase Resume Command. The Erase Resume

command must be used to restart the Program/

Erase Controller from Erase Suspend. An erase

can be suspended and resumed more than once.

STATUS REGISTER

Bus Read operations from any address always

read the Status Register during Program and

Erase operations. It is also read during Erase Sus-

pend when an address within a block being erased

is accessed.

The bits in the Status Register are summarized in

Table 7, Status Register Bits.

Data Polling Bit (DQ7). The Data Polling Bit can

be used to identify whether the Program/Erase

Controller has successfully completed its opera-

tion or if it has responded to an Erase Suspend.

The Data Polling Bit is output on DQ7 when the

Status Register is read.

During Program operations the Data Polling Bit

outputs the complement of the bit being pro-

grammed to DQ7. After successful completion of

the Program operation the memory returns to

Read mode and Bus Read operations from the ad-

dress just programmed output DQ7, not its com-

plement.

During Erase operations the Data Polling Bit out-

puts ’0’, the complement of the erased state of

DQ7. After successful completion of the Erase op-

eration the memory returns to Read Mode.

In Erase Suspend mode the Data Polling Bit will

output a ’1’ during a Bus Read operation within a

block being erased. The Data Polling Bit will

change from a ’0’ to a ’1’ when the Program/Erase

Controller has suspended the Erase operation.

Figure 3, Data Polling Flowchart, gives an exam-

ple of how to use the Data Polling Bit. A Valid Ad-

dress is the address being programmed or an

address within the block being erased.

Table 7. Status Register Bits

Note: Unspecified data bits should be ignored.

Operation

Address

DQ7

DQ6

DQ5

DQ3

DQ2

Program

Any Address

DQ7

Toggle

–

Program During Erase

Suspend

Any Address

DQ7

Toggle

–

Program Error

Any Address

DQ7

Toggle

–

Chip Erase

Any Address

Toggle

Block Erase before

timeout

Erasing Block

Toggle

Non-Erasing Block

Toggle

No Toggle

Block Erase

Erasing Block

Toggle

Non-Erasing Block

Toggle

No Toggle

Erase Suspend

Erasing Block

No Toggle

Toggle

Non-Erasing Block

Data read as normal

Erase Error

Good Block Address

Toggle

No Toggle

Faulty Block Address

Toggle

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