M29KW032E datasheet(9/30 Pages) STMICROELECTRONICS

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M29KW032E

COMMAND INTERFACE

All Bus Write operations to the memory are inter-

preted by the Command Interface. Commands

consist of one or more sequential Bus Write oper-

ations. Failure to observe a valid sequence of Bus

Write operations will result in the memory return-

ing to Read mode. The long command sequences

are imposed to maximize data security.

Refer to Tables 4 and 5, for a summary of the com-

mands.

Read/Reset Command.

The Read/Reset command returns the memory to

its Read mode where it behaves like a ROM or

EPROM, unless otherwise stated. It also resets

the errors in the Status Register. Either one or

three Bus Write operations can be used to issue

the Read/Reset command.

The Read/Reset Command can be issued, be-

tween Bus Write cycles before the start of a pro-

gram or erase operation, to return the device to

read mode. Once the program or erase operation

has started the Read/Reset command is no longer

accepted. The Read/Reset command is executed

regardless of the value of VPP (VIL, VIH or VHH).

Auto Select Command.

The Auto Select command is used to read the

Manufacturer Code and the Device Code. Three

consecutive Bus Write operations are required to

issue the Auto Select command. Once the Auto

Select command is issued the memory remains in

Auto Select mode until a Read/Reset command is

issued, all other commands are ignored. The Auto

Select command is executed regardless of the val-

ue of VPP (VIL, VIH or VHH).

From the Auto Select mode the Manufacturer

Code can be read using a Bus Read operation

with A0 = VIL and A1 = VIL. The other address bits

may be set to either VIL or VIH.

The Device Code can be read using a Bus Read

operation with A0 = VIH and A1 = VIL. The other

address bits may be set to either VIL or VIH.

Word Program Command.

The Word Program command can be used to pro-

gram a Word to the memory array. VPP must be

set to VHH during Word Program. If VPP is set to ei-

ther VIL or VIH the command will be ignored, the

data will remain unchanged and the device will re-

vert to Read/Reset mode. The command requires

four Bus Write operations, the final write operation

latches the address and data in the internal state

machine and starts the Program/Erase Controller.

During the program operation the memory will ig-

nore all commands. It is not possible to issue any

command to abort or pause the operation. Typical

program times are given in Table 6. Bus Read op-

erations during the program operation will output

the Status Register on the Data Inputs/Outputs.

See the section on the Status Register for more

details.

After the program operation has completed the

memory will return to the Read mode, unless an

error has occurred. When an error occurs the

memory will continue to output the Status Regis-

ter. A Read/Reset command must be issued to re-

set the error condition and return to Read mode.

Note that the Program command cannot change a

bit set at ’0’ back to ’1’. One of the Erase Com-

mands must be used to set all the bits in a block or

in the whole memory from ’0’ to ’1’.

Multiple Word Program Command

The Multiple Word Program command can be

used to program large streams of data. It greatly

reduces the total programming time when a large

number of Words are written to the memory at any

one time. VPP must be set to VHH during Multiple

Word Program. If VPP is set to either VIL or VIH the

command will be ignored, the data will remain un-

changed and the device will revert to Read/Reset

mode.

It has four phases: the Setup Phase to initiate the

command, the Program Phase to program the

data to the memory, the Verify Phase to check that

the data has been correctly programmed and re-

program if necessary and the Exit Phase.

Setup Phase. The Multiple Word Program com-

mand requires three Bus Write operations to ini-

tiate the command (refer to Table 5, Multiple Word

Program Command and Figure 5, Multiple Word

Program Flowchart). The Status Register Toggle

bit (DQ6) should be checked to verify that the op-

eration has started and the Multiple Word Program

bit (DQ0) checked to verify that the P/E.C. is ready

for the first Word.

Program Phase. The Program Phase requires

n+1 cycles, where n is the number of Words, to ex-

ecute the programming phase (refer to Table 5,

Multiple Word Program Command and Figure 5,

Multiple Word Program Flowchart).

Three successive steps are required to issue and

execute the Program Phase of the command.

1. The fourth Bus Write operation of the command

latches the Start Address and the first Word to

be programmed. The Status Register Multiple

Word Program bit (DQ0) should be read to

check that the P/E.C. is ready for the next Word.

2. Each subsequent Word to be programmed is

latched with a new Bus Write operation. The

address can remain the Start Address, be

incremented or be any address in the same

block, as the device automatically increments

the address with each sucssesive Bus Write

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