STR710FZ1 datasheet(45/78 Pages) STMICROELECTRONICS

部件名	STR710FZ1

功能描述	ARM7TDMI??32-bit MCU with Flash, USB, CAN 5 timers, ADC, 10 communications interfaces

PDF	78 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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45 / 78 page

STR71xF

Electrical parameters

45/78

Table 22.

PLL2 characteristics

Symbol

Parameter

Test conditions

Value

Unit

Min

Typ

Max

fPLLCLK2

PLL multiplier output

clock

140

MHz

fPLL2

PLL input clock

FREF_RANGE = 0

1.5

3.0

MHz

FREF_RANGE = 1

3.0

MHz

tLOCK2

PLL lock time

FREF_RANGE = 0

Stable Input Clock

Stable V33IOPLL, V18

300

µs

FREF_RANGE = 1

Stable Input Clock

Stable V33IOPLL, V18

600

µs

∆tJITTER2 PLL jitter (peak to peak)

tPLL = 4 MHz, MX[1:0]=’11’

Global Output division = 32

(Output Clock = 2 MHz)

0.7

Table 23.

Low-power mode wakeup timing

Symbol

Parameter

Typ

Unit

tWULPWFI Wakeup from LPWFI mode

26(1)

Clock selected is CK2_16, Main VReg OFF and Flash in power-down

µs

tWUSTOP

Wakeup from STOP mode

2048

CLK

Cycles

(2)

The CLK clock is derived from the external oscillator.

tWUSTBY

Wakeup from STANDBY mode

2048 CLK Cycles

+ 8 CLK2 Cycles(3)

Refer to Figure 7. Reset General Timing in the STR71xF Reference Manual (UM0084)

Cycles

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