®

1/18

June 1998

This is a Preliminary Data. Details are subject to change without notice.

M34S32

With User-Defined Read-Only Block and 32-Byte OTP Page

PRELIMINARY DATA

s

SUPPORTS 400kHz PROTOCOL

s

ADDRESSING

s

1 MILLION ERASE/WRITE CYCLES

s

40 YEARS DATA RETENTION

s

SINGLE SUPPLY VOLTAGE

s

HARDWARE WRITE CONTROL

s

USER-DEFINED READ-ONLY BLOCK

s

32 BYTES OTP PAGE

s

BYTE and PAGE WRITE (up to 32 BYTES)

s

BYTE, RANDOM and SEQUENTIAL READ

MODES

s

SELF TIMED PROGRAMING CYCLE

s

AUTOMATIC ADDRESS INCREMENTING

s

ENHANCED ESD and LATCH-UP

PERFORMANCES

DESCRIPTION

The M34S32 is a 32K bit electrically erasable pro-

grammable memory (EEPROM), organized as

4096 x 8 bits.

Table 1. Signal Names

SDA

Serial Data Address Input/Output

SCL

Serial Clock

WC

Write Control

WCR

Write Control of Control Register

Supply Voltage

Ground

Figure 1. Delivery Forms

Figure 2. Logic Diagram

8

1

8

1

S08 (MN)

150 mil Width

PSDIP8 (BN)

0.25 mm Frame

AI02468

SDA

VCC

M34S32

WCR

SCL

VSS

WC