M39208 datasheet(3/30 Pages) STMICROELECTRONICS

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A17

A16

Figure 3. Flash Block Sectors

impedance when the chip is deselected (both EE

and EF driven high) or the outputs are disabled (G

driven high).

Read operations are used to output the contents

from the memory, the Manufacturer identifier, the

Flash Sector protection Status, the Flash block

Identifier, the EEPROM identifier or the OTP row

content.

Memory Block Enable (EE and EF). The Memory

Block Enable (EE or EF) activates the memory

control logic, input buffers, decoders and sense

amplifiers. When the EE input is driven high, the

EEPROM memory block is not selected; when the

EF input is driven high, the Flash memory block is

not selected. Attempts to access both EEPROM

and Flash blocks (EE low and EF low) are forbid-

den. Switching between the two memory block

enables (EE and EF) must not be made on the

same clock cycle, a delay of greater than tEHFL must

be inserted.

The M39208 is in standby when both EF and EE

are High (when no internal Erase or programming

is running). The power consumption is reduced to

the standby level and the outputs are in the high

impedance state, independent of the Output En-

able G or Write Enable W inputs.

After 150ns of inactivity and when the addresses

are driven at CMOS levels, the chip automatically

enters a pseudo standby mode where consumption

is reduced to the CMOS standby value, while the

outputs continue to drive the bus.

Output Enable (G). The Output Enable gates the

outputs through the data buffers during a read

operation. The data outputs are in the high imped-

ance state when the Output Enable G is High.

During Sector Protect and Sector Unprotect opera-

tions, the G input must be forced to VID level (12V

+ 0.5V) (for Flash memory block only).

Write Enable (W). Addresses are latched on the

falling edge of W, and Data Inputs are latched on

the rising edge of W.

OPERATIONS

The M39208 memory is addressed through 18

inputs A0-A17 and provides data on eight Data

Inputs/Outputs DQ0-DQ7 with the help of four con-

trol lines: Chip Enable EEPROM (EE), Chip Enable

Flash (EF), Output Enable (E) and Write Enable

(W) inputs.

An operation is defined as the basic decoding of

the logic level applied to the control input pins (EF,

EE, G, W) and the specified voltages applied on

the relevant address pins. These operations are

detailed in Table 3.

Read. Both Chip Enable and Output Enable (that

is EF and G or EE and G) must be low in order to

read the output of the memory.

Read operations are used to output the contents

from the Flash or EEPROM block, the Manufac-

turer identifier, the Flash Sector protection Status,

the Flash block Identifier, the EEPROM identifier or

the OTP row content.

Notes:

– The Chip Enable input mainly provides power

control and should be used for device selection.

The Output Enable input should be used to gate

data onto the output in combination with active

EF or EE input signals.

– The data read depends on the previous instruc-

tion entered into the memory (see Table 4).

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