Stopping and Starting the Oscillator

The oscillator may be stopped at any time. If the

device is going to spend a significant amount of

time on the shelf, the oscillator can be turned off to

minimize current drain on the battery. The STOP

bit is the MSB of the seconds register. Setting it to

a ’1’ stops the oscillator. The M48T02/12 is shipped

from STMicroelectronics with the STOP bit set to a

’1’. When reset to a ’0’, the M48T02/12 oscillator

starts within 1 second.

Calibrating the Clock

The M48T02/12 is driven by a quartz controlled

oscillator with a nominal frequency of 32,768 Hz. A

typical M48T02/12 is accurate within

±1 minuteper

month at 25

°C without calibration. The devices are

tested not to exceed

± 35 ppm (parts per million)

oscillator frequency error at 25

°C, which equates

to about

± 1.53 minutes per month. The oscillation

rate of any crystal changes with temperature (see

Figure 10). Most clockchips compensatefor crystal

frequencyand temperatureshift error with cumber-

some trim capacitors. The M48T02/12 design,

however, employs periodic counter correction. The

calibration circuit adds or subtractscounts from the

oscillator divider circuit at the divide by 256 stage,

as shown in Figure 11. The number of times pulses

are blanked (subtracted, negative calibration) or

split (added, positive calibration) depends upon the

value loaded into the five bit Calibration byte found

in the Control Register. Adding counts speeds the

clock up, subtracting counts slows the clock down.

The Calibration byte occupies the five lower order

bits in the Control register. This byte can be set to

represent any value between 0 and 31 in binary

form. The sixth bit is a sign bit; ’1’ indicates positive

calibration, ’0’ indicates negative calibration. Cali-

bration occurs within a 64 minute cycle. The first 62

minutes in the cycle may, once per minute, have

one second either shortened or lengthened by 128

oscillator cycles. If a binary ’1’ is loaded into the

register, only the first 2 minutes in the 64 minute

cycle will be modified; if a binary 6 is loaded, the

first 12 will be affected, and so on.

Therefore, each calibration step has the effect of

adding or subtracting256 oscillator cycles for every

125,829,120actual oscillator cycles, that is +4.068

or –2.034 ppm of adjustment per calibration step in

the calibration register. Assuming that the oscillator

is in fact running at exactly 32,768 Hz, each of the

31 increments in the Calibration byte would repre-

sent +10.7 or –5.35 seconds per month which

corresponds to a total range of +5.5 or –2.75

minutes per month.

Two methods are available for ascertaining how

much calibration a given M48T02/12 may require.

The first involves simply setting the clock, letting it

run for a month and comparing it to a known

accurate reference (like WWV broadcasts). While

that may seem crude, it allows the designer to give

the end user the ability to calibrate his clock as his

environment may require, even after the final prod-

uct is packaged in a non-user serviceable enclo-

sure. All the designer has to do is provide a simple

utility that accesses the Calibration byte.

Address

Data

Function/Range

BCD Format

D7

D6

D5

D4

D3

D2

D1

D0

7FFh

10 Years

Year

Year

00-99

7FEh

0

0

0

10 M.

Month

Month

01-12

7FDh

0

0

10 Date

Date

Date

01-31

7FCh

0

FT

0

0

0

Day

Day

01-07

7FBh

0

0

10 Hours

Hours

Hour

00-23

7FAh

0

10 Minutes

Minutes

Minutes

00-59

7F9h

ST

10 Seconds

Seconds

Seconds

00-59

7F8h

W

R

S

Calibration

Control

Keys: S = SIGN Bit

FT = FREQUENCY TEST Bit (Set to ’0’ for normal clock operation)

R = READ Bit

W = WRITE Bit

ST = STOP Bit

0

= Must be set to ’0’

Table 11. Register Map

10/15

M48T02, M48T12