AI01030

5V

OUT

CL = 100pF or 5pF

CL includes JIG capacitance

1.9k

Ω

DEVICE

UNDER

TEST

1k

Ω

Figure 4. AC Testing Load Circuit

Input Rise and Fall Times

≤ 5ns

Input Pulse Voltages

0 to 3V

Input and Output Timing Ref. Voltages

1.5V

Note that Output Hi-Z is defined as the point where data is no

longer driven.

Table 4. AC Measurement Conditions

AI01377C

LITHIUM

CELL

OSCILLATOR AND

CLOCK CHAIN

VPFD

FT

VCC

VSS

32,768 Hz

CRYSTAL

VOLTAGE SENSE

AND

SWITCHING

CIRCUITRY

8 x 8 BiPORT

SRAM ARRAY

8184 x 8

SRAM ARRAY

A0-A12

DQ0-DQ7

E1

E2

W

G

POWER

Figure 3. Block Diagram

The M48T58/58Y is a non-volatile pin and function

equivalent to any JEDEC standard 8K x 8 SRAM.

It also easily fits into many ROM, EPROM, and

EEPROM sockets, providing the non-volatility of

PROMs without any requirement for special write

timing or limitations on the number of writes that

can be performed.

The 28 pin 600mil DIP CAPHAT

™ houses the

M48T58/58Y silicon with a quartz crystal and a long

life lithium button cell in a single package.

The 28 pin 330mil SOIC provides sockets with gold

plated contacts at both ends for direct connection

to a separate SNAPHAT housing containing the

battery and crystal. The unique design allows the

SNAPHAT battery package to be mounted on top

of the SOIC package after the completion of the

surface mount process. Insertion of the SNAPHAT

housing after reflow prevents potential battery and

crystal damage due to the high temperatures re-

quired for device surface-mounting. The SNAPHAT

housing is keyed to prevent reverse insertion.

The SOIC and battery/crystal packages are

shipped separately in plastic anti-static tubes or in

Tape & Reel form.

DESCRIPTION (cont’d)

3/17

M48T58, M48T58Y