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TPS73601DBVT 数据表(PDF) 22 Page - Texas Instruments |
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TPS73601DBVT 数据表(HTML) 22 Page - Texas Instruments |
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22 / 49 page ![]() 7.2.2.2 Dropout Voltage The TPS736 uses an NMOS pass transistor to achieve extremely low dropout. When (VIN – VOUT) is less than the dropout voltage (VDO), the NMOS pass transistor is in the linear region of operation and the input-to-output resistance is the RDS(on) of the NMOS pass transistor. For large step changes in load current, the TPS736 requires a larger voltage drop from VIN to VOUT to avoid degraded transient response. The boundary of this transient dropout region is approximately twice the dc dropout. Values of VIN – VOUT above this line provide normal transient response. Operating in the transient dropout region can cause an increase in recovery time. The time required to recover from a load transient is a function of the magnitude of the change in load current rate, the rate of change in load current, and the available headroom (VIN to VOUT voltage drop). Under worst-case conditions [full-scale instantaneous load change with (VIN – VOUT) close to dc dropout levels], the TPS736 can take a couple of hundred microseconds to return to the specified regulation accuracy. 7.2.2.3 Transient Response The low open-loop output impedance provided by the NMOS pass transient in a voltage follower configuration allows operation without an output capacitor for many applications. As with any regulator, the addition of a capacitor (nominal value 1μF) from the OUT pin to ground reduces undershoot magnitude but increases the duration. In the adjustable version, the addition of a capacitor, CFB, from the OUT pin to the FB pin also improves the transient response. The TPS736 does not have active pull-down when the output is over-voltage. This feature allows applications that connect higher voltage sources, such as alternate power supplies, to the output. This feature also results in an output overshoot of several percent if load current quickly drops to zero when a capacitor is connected to the output. The duration of overshoot can be reduced by adding a load resistor. The overshoot decays at a rate determined by output capacitor COUT and the internal/external load resistance. The rate of decay is given by: OUT OUT LOAD V dV / dt C 80 k R = ´ W P Fixed voltage version (4) ( ) OUT OUT 1 2 LOAD V dV / dt C 80 k R R R = ´ W + P P Adjustable voltage version (5) TPS736 SBVS038X – SEPTEMBER 2003 – REVISED MAY 2025 www.ti.com 22 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TPS736 |
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