LRI64 datasheet(12/52 Pages) STMICROELECTRONICS

部件名	LRI64

功能描述	Memory tag IC at 13.56 MHz, with 64-bit unique ID and WORM user area, ISO 15693 and ISO 18000-3 Mode 1 compliant

PDF	52 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

12 / 52 page

Data rate and data coding

LRI64

12/52

Data rate and data coding

The data coding method involves pulse position modulation. The LRI64 supports the “1-out-

of-4” pulse coding mode. Any request that the VCD might send in the “1-out-of-256” pulse

coded mode, is ignored, and the LRI64 remains in its current state.

Two bit values are encoded at a time, by the positioning of a pause of the carrier frequency

in one of four possible 18.88 µs (256/fC) time slots, as shown in Figure 6.

Four successive pairs of bits form a byte. The transmission of one byte takes 302.08 µs and,

consequently, the data rate is 26.48 Kbit/s (fC/512).

The encoding for the least significant pair of bits is transmitted first. For example Figure 5

shows the transmission of E1h (225d, 1110 0001b) by the VCD.

Figure 6.

“1-out-of-4” coding mode

AI06658

9.44 µs

75.52 µs

28.32 µs

9.44 µs

75.52 µs

47.20µs

9.44 µs

75.52 µs

66.08 µs

9.44 µs

75.52 µs

Pulse position for "00"

Pulse position for "11"

Pulse position for "10" (0=LSB)

Pulse position for "01" (1=LSB)

LRI64 数据表(PDF) 12 Page - STMicroelectronics