APM32F003F6P6-R datasheet(13/56 Pages) GEEHY

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Core

The Arm® Cortex®-M0+ core is built into the product, and the working frequency

is 24MHz, which is compatible with mainstream Arm tools and software.

The system block diagram of APM32F003x4x6 series chips is shown in Figure

Interrupt controller

4.3.1.

Nested Vector Interrupt Controller (NVIC)

The APM32F003x4x6 series chips are embedded with a nested vector interrupt

controller, which can handle up to 23 masked interrupt channels (excluding

Cortex®-M0+interrupt lines) and 4 priorities.

Nested Vector Interrupt Controller (NVIC) has tightly coupled NVIC interface,

which can directly transmit interrupt vector entry address to kernel, and can

achieve low-latency interrupt response processing. In addition, it can give

priority to high-priority interrupts, automatically save processor state, and

automatically recover when interrupts return, without extra instruction overhead.

The module provides flexible interrupt management with minimal interrupt delay.

4.3.2.

External interrupt controller (EINT)

The external interrupt controller includes four edge detectors for generating

interrupt requests. Each interrupt line can be independently configured with

trigger events and can be individually shielded. All I/O pins have external

interrupt capability, and each port has an independent interrupt vector.

Memory

See the following table for details of memory:

Table 3 Memory description

Memory

Max bytes

Function

Built-in Flash

32Kbytes

Used to store programs and data.

Built-in SRAM

4Kbytes

It can be accessed in bytes, half words (16 bits)

or full words (32 bits).

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