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TS4984FC 数据表(PDF) 19 Page - STMicroelectronics |
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TS4984FC 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 30 page ![]() TS4984FC Application Information 19/30 The output power is: For the same power supply voltage, the output power in a BTL configuration is four times higher than the output power in a single-ended configuration. 4.2 Gain in typical application schematic The typical application schematic ( Figure 62) is shown on page 18. In the flat region (no Cin effect), the output voltage of the first stage is: For the second stage: Vout2 =-Vout1 (V) The differential output voltage is: The differential gain, referred to as Gv for greater convenience, is: Vout2 is in phase with Vin and Vout1 is phased 180° with Vin. This means that the positive terminal of the loudspeaker should be connected to Vout2 and the negative to Vout1. 4.3 Low and high frequency response In the low frequency region, Cin starts to have an effect. Cin forms with Rin a high-pass filter with a -3dB cut-off frequency: In the high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel with Rfeed. It forms a low-pass filter with a -3dB cut-off frequency. FCH is in Hz. P out 2V outR MS () 2 R L ---------------------------------- = V ou t1 V – in () R fe ed R in -------------- (V) = V out 2 V ou t1 – 2V in R fee d R in -------------- (V) = G v V out2 V out1 – V in ---------------------------------- 2 R f eed R in -------------- == F CL 1 2 πR in Cin ------------------------ (Hz) = F CH 1 2 πR f eedCf eed ------------------------------------- (Hz) = |
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