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M58LW032D 数据表(PDF) 21 Page - STMicroelectronics |
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M58LW032D 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 51 page ![]() 21/51 M58LW032D STATUS REGISTER The Status Register provides information on the current or previous Program, Erase, Block Protect or Blocks Unprotect operation. The various bits in the Status Register convey information and errors on the operation. They are output on DQ7-DQ0. To read the Status Register the Read Status Reg- ister command can be issued. The Status Register is automatically read after Program, Erase, Block Protect, Blocks Unprotect and Program/Erase Re- sume commands. The Status Register can be read from any address. The contents of the Status Register can be updat- ed during an Erase or Program operation by tog- gling the Output Enable pin or by dis-activating and then reactivating the device (refer to Table 2, Device Enable). Status Register bits SR5, SR4, SR3 and SR1 are associated with various error conditions and can only be reset with the Clear Status Register com- mand. The Status Register bits are summarized in Table 10, Status Register Bits. Refer to Table 10 in conjunction with the following text descriptions. Program/Erase Controller Status (SR7). The Pro- gram/Erase Controller Status bit indicates whether the Program/Erase Controller is active or inactive. When the Program/Erase Controller Status bit is Low, VOL, the Program/Erase Controller is active and all other Status Register bits are High Imped- ance; when the bit is High, VOH, the Program/ Erase Controller is inactive. The Program/Erase Controller Status is Low im- mediately after a Program/Erase Suspend com- mand is issued until the Program/Erase Controller pauses. After the Program/Erase Controller paus- es the bit is High. During Program, Erase, Block Protect and Blocks Unprotect operations the Program/Erase Control- ler Status bit can be polled to find the end of the operation. The other bits in the Status Register should not be tested until the Program/Erase Con- troller completes the operation and the bit is High. After the Program/Erase Controller completes its operation the Erase Status, Program Status and Block Protection Status bits should be tested for errors. Erase Suspend Status (SR6). The Erase Sus- pend Status bit indicates that an Erase operation has been suspended and is waiting to be re- sumed. The Erase Suspend Status should only be considered valid when the Program/Erase Con- troller Status bit is High (Program/Erase Controller inactive); after a Program/Erase Suspend com- mand is issued the memory may still complete the operation rather than entering the Suspend mode. When the Erase Suspend Status bit is Low, VOL, the Program/Erase Controller is active or has com- pleted its operation; when the bit is High, VOH, a Program/Erase Suspend command has been is- sued and the memory is waiting for a Program/ Erase Resume command. When a Program/Erase Resume command is is- sued the Erase Suspend Status bit returns Low. Erase Status (SR5). The Erase Status bit can be used to identify if the memory has failed to verify that the block has erased correctly or that all blocks have been unprotected successfully. The Erase Status bit should be read once the Program/ Erase Controller Status bit is High (Program/Erase Controller inactive). When the Erase Status bit is Low, VOL, the mem- ory has successfully verified that the block has erased correctly or all blocks have been unprotect- ed successfully. When the Erase Status bit is High, VOH, the erase operation has failed. De- pending on the cause of the failure other Status Register bits may also be set to High, VOH. s If only the Erase Status bit (SR5) is set High, VOH, then the Program/Erase Controller has applied the maximum number of pulses to the block and still failed to verify that the block has erased correctly or that all the blocks have been unprotected successfully. s If the failure is due to an erase or blocks unprotect with VPEN low, VOL, then VPEN Status bit (SR3) is also set High, VOH. s If the failure is due to an erase on a protected block then Block Protection Status bit (SR1) is also set High, VOH. s If the failure is due to a program or erase incorrect command sequence then Program Status bit (SR4) is also set High, VOH. Once set High, the Erase Status bit can only be re- set Low by a Clear Status Register command or a hardware reset. If set High it should be reset be- fore a new Program or Erase command is issued, otherwise the new command will appear to fail. Program Status (SR4). The Program Status bit is used to identify a Program or Block Protect fail- ure. The Program Status bit should be read once the Program/Erase Controller Status bit is High (Program/Erase Controller inactive). When the Program Status bit is Low, VOL, the memory has successfully verified that the Write Buffer has programmed correctly or the block is protected. When the Program Status bit is High, VOH, the program or block protect operation has failed. Depending on the cause of the failure other Status Register bits may also be set to High, VOH. s If only the Program Status bit (SR4) is set High, VOH, then the Program/Erase Controller has applied the maximum number of pulses to the |
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