M68Z128WN datasheet(9/12 Pages) STMICROELECTRONICS

部件名	M68Z128WN

功能描述	3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable

PDF	12 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

9 / 12 page

9/12

M68Z128W

Figure 10. Low VCC Data Retention AC Waveforms

AI00664

DATA RETENTION MODE

3.6V

tCDR

VCC

VDR > 1.4V

2.2V

≥ VDR – 0.2V

≤ 0.2V

0.8V

Table 9. Low VCC Data Retention Characteristics

(TA = 0 to 70°C)

Note: 1. All other Inputs at VIH ≥ VCC – 0.2V or VIL ≤ 0.2V.

2. See Figure 10 for measurement points. Guaranteed but not tested.

tAVAV is Read cycle time.

Symbol

Parameter

Test Condition

Min

Typ

Max

Unit

ICCDR

(1)

Supply Current (Data Retention)

VCC = 3V, E1 ≥ VCC – 0.2V,

≤ 0.2V, f = 0

0.01

µA

VDR

(1)

Supply Voltage (Data Retention)

≥ VCC – 0.2V, E2 ≤ 0.2V, f = 0

1.4

tCDR

(1,2)

Chip Disable to Power Down

≥ VCC – 0.2V, E2 ≤ 0.2V, f = 0

0ns

(2)

Operation Recovery Time

tAVAV

M68Z128WN 数据表(PDF) 9 Page - STMicroelectronics

M68Z128WN 数据表(HTML) 9 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12

数据表下载