M68Z128WN datasheet(4/12 Pages) STMICROELECTRONICS

部件名	M68Z128WN

功能描述	3V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable

PDF	12 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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M68Z128W

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Figure 4. Block Diagram

AI00665

ROW

DECODER

(9)

CHIP ENABLE.

INPUT

DATA

CTRL

(8)

COLUMN

DECODER

I/O CIRCUITS

(8)

CHIP ENABLE.

CHIP

ENABLE

MEMORY

ARRAY

VCC

VSS

Table 6. DC Characteristics

(TA = 0 to 70°C; VCC = 3.0V + 0.6V / –0.3V)

Note: 1. Average AC current, Outputs open, cycling at tAVAV minimum.

2. All other Inputs at VIL ≤ 0.8V or VIH ≥ 2.0V.

3. All other Inputs at VIL ≤ 0.2V or VIH ≥ VCC –0.2V.

Symbol

Parameter

Test Condition

Min

Typ

Max

Unit

ILI

Input Leakage Current

≤ VIN ≤ VCC

±1

µA

ILO

Output Leakage Current

≤ VOUT ≤ VCC

±1

µA

ICC1

(1)

Supply Current

VCC = 3.6V, (-70)

ICC2

(2)

Supply Current (Standby) TTL

VCC = 3.6V, E1 = VIH or

E2 = VIL, f =0

300

µA

ICC3

(3)

Supply Current (Standby) CMOS

VCC = 3.6V, E1 ≥ VCC – 0.2V

or E2

≤ 0.2V, f =0

0.4

µA

VIL

Input Low Voltage

–0.5

0.8

VIH

Input High Voltage

VCC + 0.5

VOL

Output Low Voltage

IOL = 2.1mA

0.4

VOH

Output High Voltage

IOH = –1mA

2.4

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