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AS3715 数据表(PDF) 67 Page - ams-OSRAM AG |
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AS3715 数据表(HTML) 67 Page - ams-OSRAM AG |
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67 / 159 page ![]() Page 66 ams Datasheet Document Feedback [v1-03] 2015-Aug-10 AS3715 − Detailed Description – System Functions Figure 69: GPIO Block Diagram GPIO Block Diagram: Shows the internal structure of the IO pads. IO Functions Normal IO Operation If set to input, the logic level of the signal present at the GPIOx pin can be read from gpioX_in. If the output mode is chosen, gpioX_out specifies the logic level of the GPIOx pin. This mode is also used for the ON/OFF control of the DCDC and LDOs. The selection which regulator is controlled by which GPIO, is done with the gpio_ctrl_sdX or gpio_ctrl_ldoX bits. The gpioX_mode should be set to input. Interrupt Output GPIOx pin logic state is derived from the interrupt signal INT. Whenever an interrupt is present, the GPIOx pin is pulled high. The gpioX_mode should be set to output. VSUP_low Output GPIOx pin will go high if VSUP falls below ResVoltFall and SupResEn = 0. The gpioX_mode should be set to output. GPIO Interrupt Input A falling or rising edge will set the gpio_int bit. The gpioX_mode should be set to input. JSLR;BRXW 9683B9%$7BORZ RXWSXW SZUBJRRG RXWSXW 4N RXWSXW LQWHUUXSW RXWSXW FKDUJHU DFWLY H RXWSXW (2& RXWSXW 3: 0 RXWSXW JSLR;BLQ FXUUHQW V LQN 3:0 LQSXW YV HOHFW LQSXW VWDQGE\ YV HOHFW LQSXW *3,2 ,QWHUU XSW LQSXW P$ FKDUJHU LQSXW P$$ FKDUJHU LQSXW FKDUJHU HQDEOH LQSXW JSLR;BLQYHUW JSLR;BLRVI *3,2 JSLR;BLRVI *3,2 JSLR;BPRGH RU JSLR;BPRGH JSLR;BPRGH RU JSLR;BPRGH RU JSLR;BPRGH RU N N 9683B*3,2 *3,2[ $'& LQSXW *3,2 RQO\ ZDWFKGRJ LQSXW |
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